US 7,461,180 B2Granted

Method and apparatus for synchronizing use of buffer descriptor entries for shared data packets in memory

AssigneeCisco Technology, Inc.

InventorsWilliam Lee, Trevor Gamer, Martin Hughes, Dennis Briddell

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Abstract

Techniques for synchronizing use of buffer descriptors for data, such as packets transmitted over a network, include receiving private index data that indicates a particular buffer descriptor owned by a DMA controller, for moving data between a data port and a corresponding memory buffer. A write command is placed on a memory exchange queue to change the owner to a different processor and the private index data is incremented. A public index is determined, which indicates a different buffer descriptor in which the owner is most recently changed to the processor and is known to be visible to the processor. In response to receiving a request from the processor for the most recent buffer descriptor changed to processor ownership, the public index data is sent to the processor. Based on the public index data, the processor exchanges data with buffer descriptors guaranteed to be owned by the processor.

Claims30

Dependent claims

An apparatus for synchronizing use of buffer descriptors for shared packet data in memory, comprising:

a network interface that is coupled to a network for communicating therewith a data packet;
one or more processors;
one or more memory devices comprising computer-readable media for storing
packet data for the data packet in one or more memory buffers of a plurality of allocated memory buffers for storing data from a plurality of data packets, and
a plurality of buffer descriptors corresponding to the plurality of allocated memory buffers;
and
a data communication channel connected to the network interface, the one or more processors and the one or more memory devices,
wherein:
each buffer descriptor holds data that includes
location data that indicates a location of a corresponding memory buffer and
owner data that indicates which of the network interface and the one or more processors has current exclusive use of the corresponding memory buffer;
the network interface includes a direct memory access (DMA) controller for exchanging data between the network interface and the one or more memory devices;
the DMA controller includes
a queue of memory exchange commands to be sent over the data communication channel to the one or more memory devices,
a private index register that holds data that indicates an index to a first buffer descriptor most recently used in the queue, and
a different public index register that holds data that indicates an index to a second buffer descriptor;
the DMA controller is configured to send data that includes data from the public index register in response to a request, from the one or more processors, for a buffer descriptor most recently used;
and
when the second buffer descriptor is accessed by the one or more processors after receiving the data from the public index register, the contents of the second buffer descriptor are guaranteed to include owner data that indicates the one or more processors.

16 more elements

A direct memory access (DMA) controller for synchronizing use of buffer descriptors for storing data shared by the DMA controller and a different process, comprising:

means for receiving descriptor data that indicates a plurality of buffer descriptors corresponding to a plurality of memory buffers for storing a plurality of data packets, wherein each buffer descriptor holds data that includes location data that indicates a location of a corresponding memory buffer and owner data that indicates which of a network interface direct memory access
(DMA) controller and a different processor has current exclusive use of the corresponding memory buffer;
means for receiving private index data that indicates a particular buffer descriptor of the plurality of buffer descriptors, wherein the owner data of the particular buffer descriptor indicates the DMA controller, for moving data between a data port and the corresponding memory buffer;
means for placing, on a queue of memory exchange commands to be sent over a data communication channel to one or more memory devices that store the plurality of memory buffers and the plurality of buffer descriptors, a memory exchange command including the private index data to exchange data with the particular buffer descriptor and change the owner data from indicating the DMA controller to indicating the processor for subsequent use by the processor;
means for incrementing the private index data;
means for determining public index data that indicates a different buffer descriptor in which owner data most recently changed from indicating the DMA controller to indicating the processor is known to be visible to the processor;
means for receiving a request from the processor for a most recently used buffer descriptor;
means for sending the public index data to the processor in response to receiving the request from the processor, whereby, based on the public index data, the processor exchanges data with a plurality of buffer descriptors in which the owner data indicates the processor, beginning with a buffer descriptor in which the owner data changed least recently from indicating the DMA up to the different buffer descriptor.

5 more elements

A method for synchronizing use of buffer descriptors for a data packet, the method comprising the steps of:

receiving descriptor data that indicates a plurality of buffer descriptors corresponding to a plurality of memory buffers for storing a plurality of data packets transmitted through a data port, wherein each buffer descriptor holds data that includes
location data that indicates a location of a corresponding memory buffer and
owner data that indicates which of a network interface direct memory access (DMA) controller and a different processor has current exclusive use of the corresponding memory buffer;
receiving private index data that indicates a particular buffer descriptor of the plurality of buffer descriptors, wherein the owner data of the particular buffer descriptor indicates the DMA controller, for moving data between the data port and the corresponding memory buffer;
placing, on a queue of memory exchange commands to be sent over a data communication channel to one or more memory devices that store the plurality of memory buffers and the plurality of buffer descriptors, a memory exchange command including the private index data to exchange data with the particular buffer descriptor and change the owner data from indicating the DMA controller to indicating the processor for subsequent use by the processor;
incrementing the private index data;
determining public index data that indicates a different buffer descriptor in which owner data most recently changed from indicating the DMA controller to indicating the processor is known to be visible to the processor;
receiving a request from the processor for a most recently used buffer descriptor;
in response to receiving the request from the processor, sending the public index data to the processor, whereby, based on the public index data, the processor exchanges data with a plurality of buffer descriptors in which the owner data indicates the processor, beginning with a buffer descriptor in which the owner data changed least recently from indicating the DMA up to the different buffer descriptor.

6 more elements

Dependencies are inferred from the claim text.