Pulse width adjustment circuit, pulse width adjustment method, and test apparatus for semiconductor device

Abstract

There is provided a pulse width adjusting circuit for generating an output signal by adjusting a pulse width of an input pulse signal and outputting the output signal. The pulse width adjusting circuit includes a first delay circuit to output a first delay signal generated by delaying the pulse signal by a certain delay time, a second delay circuit to output a second delay signal generated by delaying the pulse signal by a different delay time from the first delay circuit, and an output section to generate and output the output signal in accordance with the first and second delay signals. Here, the output signal has a pulse width corresponding to a difference between the delay times respectively achieved by the first and second delay circuits.

Dependencies are inferred from the claim text.