# US 7,460,922 B1 · Scanner optimization for reduced across-chip performance variation through non-contact electrical metrology

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- Number: US 7,460,922 B1
- Document ID: US7460922B1
- Status: Granted
- Kind: B1
- Application number: 11/298,340
- Filed: 2005-12-07
- Granted: 2008-12-02
- Earliest claimed: 2005-12-07
- Assignees: Advanced Micro Devices, Inc.
- Inventors: Bhanwar Singh; Jason Phillip Cain; Harish Kumar Bolla; Iraj Emami
- Web page: https://patentgrep.com/patent/US7460922B1

## CPC

- G03F 7/70658: {Electrical testing}
- G03F 7/70491: {Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes}
- G03F 7/70558: {Dose control, i.e. achievement of a desired dose}
- G05B 2219/37224: Inspect wafer
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)
- G05B: CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS (systems for controlling or regulating non-electric variables G05D; systems for regulating electric or magnetic variables G05F; control devices or systems insofar as characterised by mechanical features only G05G)

## Abstract

The disclosed embodiments reduce across-chip performance variation through non-contact electrical metrology. According to a feature is a process control system that includes a component that measures transistor electrical performance in a product wafer. Also included in the system is a mapping component that converts the transistor performance into exposure dose values and a process tool that communicates the exposure dose value to a scanner. The exposure dose value is fed back for optimization of future chip exposures. The disclosed embodiments directly optimize transistor performance, thus controlling an important parameter in many integrated circuits.

## Claims

### Claim 1

A process control system, comprising:
a component that measures transistor electrical performance in a production wafer;
a mapping component that converts the transistor performance into exposure dose values;
a control component comprising an artificial intelligence component that infers adjustments to exposure doses as a function of scan distance to facilitate achievement of increased performance of chips made in future production lots; and
a process tool that communicates the exposure dose value to a scanner to implement the adjustments to exposure doses.

### Claim 2 (depends on 1)

The system of claim 1, the scanner exposes the production wafer to a predetermined exposure dose range.

### Claim 3 (depends on 1)

The system of claim 1, the electrical performance is measured at multiple locations of the production wafer to characterize a spatial variation in the transistor performance.

### Claim 4 (depends on 1)

The system of claim 1, the measurement is a subset of a standard production process flow.

### Claim 5 (depends on 1)

The system of claim 1, the exposure dose value is modulated by a scanning speed.

### Claim 6 (depends on 1)

The system of claim 1, the process tool further communicates the exposure dose value to a user.

### Claim 7 (depends on 1)

The system of claim 1, the measurement is performed as a subset of a fabrication process.

### Claim 8 (depends on 1)

The system of claim 1, further comprising:
an advanced process control engine that determines at least one scanner process parameter change.

### Claim 9 (depends on 1)

The system of claim 1, further comprising:
an artificial intelligence component that infers a fabrication process modification.

### Claim 10

A method for reducing across-chip performance variation, comprising:
measuring transistor electrical performance in production chips;
converting the transistor electrical performance into a corresponding exposure dose value;
inferring adjustments to exposure doses as a function of scan distance to facilitate achievement of increased performance of chips made in future production lots; and
applying the corresponding exposure dose value to subsequent product chips to implement the adjustments to exposure doses.

### Claim 11 (depends on 10)

The method of claim 10, before measuring transistor electrical performance in production chips further comprising:
exposing production chips with programmed exposure dose ranges.

### Claim 12 (depends on 10)

The method of claim 10, transistor electrical performance is measured with non-contact electrical metrology.

### Claim 13 (depends on 10)

The method of claim 10, further comprising:
varying a scanning speed to modulate an across-chip exposure dose.

### Claim 14 (depends on 10)

The method of claim 10, further comprising:
altering an across-chip exposure dose on a chip-by-chip basis.

### Claim 15 (depends on 10)

The method of claim 10, measuring transistor electrical performance in production chips is made at multiple locations within the chip.

### Claim 16 (depends on 10)

The method of claim 10, further comprising:
communicating at least one fabrication parameter change to a user.

### Claim 17

A system that reduces across-chip performance variation during device fabrication, comprising:
means for exposing a wafer with a programmed exposure dose range;
means for determining a relationship between exposure dose and transistor performance;
means for measuring transistor electrical performance;
means for converting the transistor electrical performance into exposure dose values; and
means for inferring adjustments to exposure doses as a function of scan distance to facilitate achievement of increased performance of chips made in future production lots.

### Claim 18 (depends on 17)

The system of claim 17, further comprising:
means for communicating the exposure dose value to the means for exposing a wafer with a programmed exposure dose range.

### Claim 19 (depends on 17)

The system of claim 17, the means for measuring transistor electrical performance is performed using non-contact electrical metrology.

### Claim 20 (depends on 17)

The system of claim 17, further comprising:
means for automatically adjusting at least one fabrication parameter.