Electronic circuit for performing fractional time domain interpolation and related devices and methods
AssigneeSTMicroelectronics Belgium NV
InventorFabio Pisoni
Life of this patent
Estimating the term…
Abstract
A clock offset compensation arrangement may include a fractional interpolator for applying a trigonometric interpolation to a sampled input signal according to a clock offset signal. It uses transform-based processing in the frequency domain. Compared to a polynomial type interpolation it may be easier to implement, and may achieve a closer approximation to an ideal interpolation. It may reduce the effects of non-linear type errors introduced by truncation of higher powers. The arrangement may be applied to receivers or transmitters of multi-carrier modems, as well as other applications which use rate adaptation or synchronization.
Claims37
A clock offset compensation circuit for compensating a clocked input signal comprising:
- a first input for receiving the clocked input signal;
- a second input for receiving an estimated clock offset signal;
- and
- a fractional fast Fourier transform interpolator connected to said first and second inputs for applying a trigonometric interpolation to the clocked input signal based upon the received estimated clock offset signal to provide a clock offset compensated signal, with said fractional fast Fourier transform interpolator applying an inverse fast Fourier transform (IFFT) to the clocked input signal in the frequency domain, followed by a chirp Z transform based upon the estimated clock offset signal, to provide the clock offset compensated signal in the frequency domain.
An electronic device comprising:
- a clock offset estimator for generating an estimated clock offset signal associated with a clocked input signal;
- and
- a fractional fast Fourier transform interpolator for applying a trigonometric interpolation to the clocked input signal based upon the estimated clock offset signal to provide a clock offset compensated signal, with said fractional fast Fourier transform interpolator a lying an inverse fast Fourier transform (IFFT) to the clocked input signal in the frequency domain, followed by a chirp Z transform based upon the estimated clock offset signal, to provide the clock offset compensated signal in the frequency domain.
A method of clock offset compensation for a clocked input signal comprising:
- generating an estimated clock offset signal associated with the clocked input signal;
- and
- performing a fractional fast Fourier transform interpolation by applying a trigonometric interpolation to the clocked input signal based upon the estimated clock offset signal to provide a clock offset compensated signal, with the fractional fast Fourier transform interpolation a plying an inverse fast Fourier transform (IFFT) to the clocked input signal in the frequency domain, followed by a chirp Z transform based upon the estimated clock offset signal, to provide the clock offset compensated signal in the frequency domain.
A computer-readable medium having computer-executable instructions for causing a clock offset compensation circuit to perform steps comprising:
- generating an estimated clock offset signal associated with a clocked input signal;
- and
- performing a fraction fast Fourier transform interpolation by applying a trigonometric interpolation to the clocked input signal based upon the estimated clock offset signal to provide a clock offset compensated signal, with the fractional fast Fourier transform interpolation applying an inverse fast Fourier transform (IFFT) to the clocked input signal in the frequency domain, followed by a chirp Z transform based upon the estimated clock offset signal, to provide the clock offset compensated signal in the frequency domain.
A clock offset compensation circuit for compensating a clocked input signal comprising:
- a first input for receiving the clocked input signal;
- a second input for receiving an estimated clock offset signal;
- and
- a fractional fast Fourier transform interpolator connected to said first and second inputs for applying a trigonometric interpolation to the clocked input signal based upon the received estimated clock offset signal to provide a clock offset compensated signal comprising a plurality of blocks, with said fractional fast Fourier transform interpolator generating time domain guard bands to separate the blocks of the clock offset compensated signal.
An electronic device comprising:
- a clock offset estimator for generating an estimated clock offset signal associated with a clocked input signal;
- and
- a fractional fast Fourier transform interpolator for applying a trigonometric interpolation to the clocked input signal based upon the estimated clock offset signal to provide a clock offset compensated signal comprising a plurality of blocks, with said fractional fast Fourier transform interpolator generating time domain guard bands to separate the blocks of the clock offset compensated signal.
An electronic device comprising:
- a clock offset estimator for generating an estimated clock offset signal associated with a clocked input signal;
- a fractional fast Fourier transform interpolator for applying a trigonometric interpolation to the clocked input signal based upon the estimated clock offset signal to provide a clock offset compensated signal;
- a modulator for modulating at least one carrier to generate a carrier signal;
- and
- a clocked output circuit for generating the clocked input signal based upon the carrier signal;
- said clock offset estimator, fractional fast Fourier transform interpolator, modulator, and clocked output circuit defining a transmitter.
A method of clock offset compensation for a clocked input signal comprising:
- generating an estimated clock offset signal associated with the clocked input signal;
- and
- performing a fractional fast Fourier transform interpolation by applying a trigonometric interpolation to the clocked input signal based upon the estimated clock offset signal to provide a clock offset compensated signal comprising a plurality of blocks, with the fractional fast Fourier transform interpolation generating time domain guard bands to separate the blocks of the clock offset compensated signal
Dependencies are inferred from the claim text.