Method for path searching and verification
AssigneeTelefonaktiebolaget LM Ericsson (publ)
InventorsAli S. Khayrallah, Carmela Cozzo, Gregory E. Bottomley
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AssigneeTelefonaktiebolaget LM Ericsson (publ)
InventorsAli S. Khayrallah, Carmela Cozzo, Gregory E. Bottomley
Estimating the term…
The present application describes a new path search and verification method and apparatus for identifying and selecting one or more delays for a receiver. A front-end receiver receives a signal having one or more signal images, where each signal image has a corresponding signal delay. A tree generator builds a hierarchical delay tree from a plurality of delay nodes, each corresponding to one of the signal delays. A tree searcher searches through the delay tree to identify one or more surviving delay nodes, where each surviving delay node corresponds to a candidate delay for the receiver. The receiver may also include a state machine comprising a plurality of ordered states for providing candidate delays for the receiver. The state machine stores the candidate delays and shifts the candidate delays between states within the state machine based on the latest results from the tree searcher.
A search method for identifying one or more candidate delays for a receiver comprising:
A method for selecting one or more finger delays for a RAKE receiver comprising:
A delay searcher for a receiver to search a received signal having a plurality of signal images corresponding to a plurality of signal delays for one or more candidate delays, the delay searcher comprising:
A RAKE receiver in a wireless network comprising:
A circuit for processing a received signal having one or more signal images, each signal image having a corresponding signal delay, the circuit comprising search circuitry to generate and search through a hierarchical delay tree based on delay nodes associated with the signal delays to identify one or more surviving delay nodes, wherein each surviving delay node corresponds to a candidate delay, and wherein the search circuitry traverses downward through the hierarchical delay tree to identify one or more surviving nodes at each level during said downward traversal by comparing a value associated with each node traversed with a predetermined threshold.
Dependencies are inferred from the claim text.