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US 7,460,428 B2Granted
Dynamic random access memory and communications terminal including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsJae-hoon Joo, Sang-seok Kang, Byung-heon Kwak, Kang-young Cho, Chang-hag Oh
Life of this patent
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Abstract
Provided is a DRAM having reduced current consumption and a communication terminal including the same. The DRAM includes a plurality of memory banks capable of being independently supplied with power, and a DPD controller for selectively causing some of the plurality of memory banks to enter a DPD mode.
Claims21
A dynamic random access memory (DRAM) comprising:
- a plurality of memory banks, each one independently supplied with a power supply voltage and adapted to operate in a deep power down (DPD) mode;
- and
- a DPD controller adapted to select a memory bank from the plurality of memory banks and cause the selected memory bank to enter into the DPD mode.
A dynamic random access memory (DRAM) comprising:
- a plurality of memory banks, each one independently supplied with a power supply voltage and adapted to operate in a deep power down (DPD) mode;
- a plurality of internal power supply voltage sections, each one arranged in relation to a corresponding one of the plurality of memory banks and adapted to provide an internal power supply voltage thereto;
- and
- a DPD controller adapted to selectively disable the plurality of internal power supply voltage section, wherein a memory bank corresponding to a disabled internal power supply voltage section enters into the DPD mode.
1 more element
A communication terminal comprising:
- an integrated processor adapted to process communication data and multimedia data;
- and
- a dynamic random access memory (DRAM) adapted to receive and temporarily store data associated with the integrated processor, wherein the DRAM comprises a plurality of memory banks, each one independently supplied with a power supply voltage and adapted to operate in a deep power down (DPD) mode, and a DPD controller adapted to select a memory bank from the plurality of memory banks to enter into the DPD mode.
Dependencies are inferred from the claim text.