Method and apparatus for reducing leakage current in a read only memory device using shortened precharge phase

A method for reading a read only memory device, comprising the steps of:

• precharging said read only memory device during a given read cycle, wherein precharging occurs during a precharge phase;
• evaluating said read only memory device following said precharging of said read only memory device during said given read cycle, and
• forming only a single clock signal comprising a first clock edge and a second clock edge;
• wherein the first clock edge initiates the given read cycle, wherein the first clock edge initiates an information request from the read only memory device, and wherein said precharge phase terminates independent of the first clock edge.

An integrated circuit, comprising:

• a read only memory device, comprising:
• one or more transistors;
• and
• a circuit to read said one or more transistors during a read cycle, wherein the read only memory device is coupled to only a single clock signal comprising a first clock edge and a second clock edge, wherein a first clock edge initiates the read cycle, wherein the first clock edge initiates an information request from the read only memory device, wherein said read cycle positions a precharge phase prior to an evaluation phase, and wherein said precharge phase terminates independent of the first clock edge.