Voltage supply circuit and semiconductor memory

A semiconductor memory comprising:

• a plurality of memory cells;
• a plurality of pairs of bit lines that are correspondingly connected to said memory cells;
• a plurality of equalizing circuits that are provided to correspond to said pairs of bit lines;
• a plurality of precharging circuits that are provided to correspond to said pairs of bit lines in order to connect said pairs of bit lines to a precharging voltage line;
• a voltage supply circuit whose output node is connected to said precharging voltage line;
• and
• a control circuit that activates a drivability control signal to said voltage supply circuit when a current to be supplied to said precharging voltage line by said voltage supply circuit needs to be increased, wherein said voltage supply circuit has first and second voltage supply parts that are provided in parallel with respect to said output node, in which
• said first voltage supply part includes
• a first differential amplifier that receives a voltage of said output node and a first voltage as input voltages, and activates its output signal when the voltage of said output node is lower than said first voltage,
• a second differential amplifier that receives the voltage of said output node and a second voltage which is higher than said first voltage as input voltages, and activates its output signal when the voltage of said output node is higher than said second voltage, and
• a first driving circuit that connects said output node to a high power supply line in response to the activation of the output signal of said first differential amplifier, and connects said output node to a low power supply line in response to the activation of the output signal of said second differential amplifier, and
• said second voltage supply part includes
• a third differential amplifier that receives the voltage of said output node and said first voltage as input voltages, and, only during the activation period of said drivability control signal, activates its output signal when the voltage of said output node is lower than said first voltage,
• a fourth differential amplifier that receives the voltage of said output node and said second voltage as input voltages, and, only during the activation period of said drivability control signal, activates its output signal when the voltage of said output node is higher than said second voltage, and
• a second driving circuit that connects said output node to said high power supply line in response to the activation of the output signal of said third differential amplifier, and connects said output node to said low power supply line in response to the activation of the output signal of said fourth differential amplifier, only during the activation period of said drivability control signal.