Ferroelectric memory device

A ferroelectric memory device comprising:

• a plurality of first bit lines;
• a plurality of first memory cells that are connected to each of the first bit lines and store first data or second data;
• a plurality of first read-out voltage generation sections, each of which is connected to each of the plurality of first bit lines, and upon reading data from the plurality of first memory cells, generates a read-out voltage based on the data;
• a second bit line;
• a second memory cell that is connected to the second bit line and stores the first data;
• a second read-out voltage generation section that is connected to the second bit line, and upon reading data from the second memory cell, generates a read-out voltage based on the data;
• a first reference voltage generation section connected to the second read-out voltage generation section;
• and
• a plurality of first sense amplifiers connected to each of the read-out voltage generation sections and the first reference voltage generation section,
• wherein each of the read-out voltage generation sections includes a first n-type MOS transistor having a source to which a first voltage is supplied, a first precharge section that pre-charges a drain of the first n-type MOS transistor with a second voltage that is a positive voltage higher than the first voltage, a transistor control section that, when data stored in any of the memory cells is read out onto each of the bit lines, controls a channel resistance between the source and the drain of the first n-type MOS transistor based on a voltage on the bit line to lower the voltage on the drain pre-charged to the second voltage, thereby generating the read-out voltage, and a voltage control section that lowers the voltage on the bit line based on the lowering of the voltage on the drain;
• the first reference voltage generation section has a voltage supply capacity greater than the second read-out voltage generation section, and receives a read-out voltage generated by the second read-out voltage generation section, and generates a first reference voltage that is generally the same voltage as the read-out voltage;
• and
• the plurality of first sense amplifiers compare the read-out voltage generated by the corresponding first read-out voltage generation sections with the first reference voltage, respectively, to thereby judge data stored in the first memory cells.