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US 7,460,384 B2Granted
Low cost high density rectifier matrix memory
AssigneeContour Semiconductor, Inc.
InventorDaniel Robert Shepard
Life of this patent
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Abstract
A high density memory device is fabricated three dimensionally in layers. To keep points of failure low, address decoding circuits are included within each layer so that, in addition to power and data lines, only the address signal lines need be interconnected between the layers.
Claims6
An electronic array circuit comprising:
- a plurality of generally parallel rows and a plurality of generally parallel columns that are generally orthogonal and overlapping;
- test circuitry comprising connections between the alternate ends of every evenly numbered row such that continuity of half of the rows can be tested by passing a current;
- test circuitry further comprising connections between the alternate ends of every oddly numbered row such that continuity of the other half of the rows can be tested by passing a current.
Dependencies are inferred from the claim text.