Driving apparatus of plasma display panel
AssigneeSamsung SDI Co., Ltd.
InventorsJin-Sung Kim, Woo-Joon Chung, Seung-Hun Chae
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Abstract
A driving apparatus of a plasma display panel. In a scan electrode driving circuit, a drain of a first transistor is coupled to a scan electrode, and a driver of the first transistor is coupled to the gate and a source of the first transistor. During a reset period, the driver turns on the first transistor and reduces a voltage at a scan electrode and then turns off the first transistor so as to gradually reduce the voltage of the scan electrode by floating the scan electrode. Further, a selecting voltage may be applied to the scan electrode by turning on the first and second transistors during an address period. Thus, the transistor used during the reset period may be used in the address period.
Claims19
A driving apparatus of a plasma display panel having a capacitive load formed by at least two electrodes, comprising:
- a first transistor having a first main end coupled to a first electrode of the capacitive load;
- a capacitor having a first end coupled to a second main end of the first transistor and a second end coupled to a first power supplying a first voltage;
- and
- a second transistor coupled between the second main end of the first transistor and a second power supplying a second voltage,
- wherein the capacitor receives charges from the capacitive load when the first transistor turns on;
- wherein a voltage at the first electrode is reduced by repeating a process of turning on and turning off the first transistor during a reset period;
- and
- wherein the first transistor and the second transistor turn on during an address period such that the second voltage is applied to the first electrode via the first transistor and the second transistor.
A driving apparatus of a plasma display panel having a capacitive load formed by at least two electrodes, comprising:
- a first transistor having a first main end coupled to a first electrode of the capacitive load;
- a driver coupled between a control end and a second main end of the first transistor and a first power supplying a first voltage;
- and
- a second transistor coupled between the second main end of the first transistor and a second power supplying a second voltage,
- wherein the driver controls an operation of the first transistor to gradually reduce a voltage at the first electrode during a reset period;
- wherein the second voltage is supplied to the first electrode via the first transistor and the second transistor when the first transistor and the second transistor are turned on during an address period.
Dependencies are inferred from the claim text.