Offset adjusting circuit and operational amplifier circuit

An operational amplifier circuit, comprising:

• an operational amplifier including an offset adjustment input terminal;
• a first switching element for short-circuiting a non-inverting input terminal of the operational amplifier and an inverting input terminal of the operational amplifier;
• a second switching element for disconnecting the inverting input terminal of the operational amplifier from a negative-phase input signal;
• one or more latch circuits each latching an output voltage of the operational amplifier by regarding the output voltage as a binary logical signal which is a logical value being quantized by using a weighted offset adjustment amount;
• a storage circuit for storing the logical signal latched by each of the latch circuits;
• and
• a control circuit for (i) generating in accordance with the logical signal stored in the storage circuit, an offset adjustment signal for adjusting an offset of the operational amplifier, and (ii) supplying the offset adjustment signal to the offset adjustment input terminal,
• said operational amplifier circuit being configured to adjusting an offset in the output voltage.

An offset adjusting circuit configured to generate an offset adjustment signal for an operational amplifier including an offset adjustment input terminal, and input the offset adjustment signal to the offset adjustment input terminal, the offset adjusting circuit comprising:

• a first switching element configured to short-circuit a non-inverting input terminal of the operational amplifier and an inverting input terminal of the operational amplifier;
• a second switching element configured to disconnect the inverting input terminal of the operational amplifier from a negative-phase input signal;
• one or more latch circuits each configured to latch an output voltage of the operational amplifier by regarding the output voltage as a binary logic signal which is a logic value being quantized by using a weighted offset adjustment amount;
• a storage circuit configured to store the logical signal latched by each of the latch circuits;
• and
• a control circuit configured to generate in accordance with the logical signal stored in the storage circuit, the offset adjustment signal for the operational amplifier.