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US 7,459,944 B2Granted
Low current wide VREF range input buffer
AssigneeMicron Technology, Inc.
InventorsTimothy B. Cowles, Steve Casper
Life of this patent
Estimating the term…
Abstract
A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symmetry across a wide range of reference and supply voltages.
Claims21
A differential input buffer, comprising:
- a buffer circuit having separate p- and n-channel differential amplifiers arranged to each receive a pair of input signals, said p- and n-channel differential amplifiers each being self-biased and having a current mirror portion;
- a resistive circuit, at least one of said p- and n-channel differential amplifiers being coupled to said resistive circuit;
- and
- an output terminal for combining the outputs of said p- and n-channel differential amplifiers to form an output of said differential input buffer, said output terminal being coupled to a pair of series transistors,
- wherein said p- and n-channel differential amplifiers are coupled to a shared p-channel enable transistor.
2 more elements
A processing system circuit, comprising:
- a processor;
- and
- a memory circuit for exchanging data with said processor;
- wherein at least one of said processor and memory circuit comprise an input buffer circuit, said input buffer circuit further comprising:
- a buffer circuit having separate p- and n-channel differential amplifiers, wherein said separate p- and n-channel differential amplifiers are each self-biased and having a current mirror portion;
- and
- a resistive circuit, at least one of said p- and n-differential amplifiers being coupled to said resistive circuit,
- wherein the outputs of said differential amplifiers are combined to form an output of said differential input buffer, said output being coupled to a pair of series transistors, and
- wherein said p- and n-channel differential amplifiers are coupled to a shared p-channel enable transistor.
6 more elements
A method of operating an input buffer, comprising:
- self-biasing a pair of separate p- and n-channel differential amplifiers, each of said differential amplifiers having a current mirror portion;
- enabling at least one of said p- and n-channel differential amplifiers, wherein said p- and n-differential amplifiers are coupled to a resistive circuit and to at least one pair of series transistors at an output node;
- detecting an input signal;
- comparing said input signal with a reference signal using said separate p- and n-channel differential amplifiers;
- and
- emitting the results of said comparison as an output signal,
- wherein said p- and n-channel differential amplifiers are coupled to a shared p-channel enable transistor.
4 more elements
Dependencies are inferred from the claim text.