Low voltage CMOS driver for inductive loads

Abstract

A low voltage Complementary Metal Oxide Semiconductor (CMOS) driver circuit for inductive loads is described. The circuit includes at least two first transistor devices, each first transistor device having a drain coupled to an inductive load, a respective second transistor device corresponding to each first transistor device having a drain coupled to a gate of the corresponding first transistor device, and a respective third transistor device corresponding to each first transistor device having a drain coupled to a source of the corresponding first transistor device. If a second transistor device corresponding to a first transistor device of the two first transistor devices is turned off, then a third transistor device corresponding to the remaining first transistor device is turned off, a gate of the first transistor device is floating and a drain-to-gate voltage at the first transistor device is reduced to below a predetermined supply voltage applied at a source of the respective second transistor device.

Dependencies are inferred from the claim text.