Programmable logic devices with transparent field reconfiguration

A programmable logic device comprising:

• a plurality of logic blocks;
• a plurality of registers, wherein the logic blocks and the registers are within a user programmable logic area;
• an input/output block, wherein the input/output block comprises a boundary scan cell adapted to precondition at least one of the registers with a desired signal value, prior to release of control of the input/output block to user-defined logic provided by a reconfiguration, such that the register provides the desired data value after the reconfiguration;
• a volatile memory block adapted to store data within the programmable logic device;
• configuration memory cells adapted to store first configuration data for configuration of the logic blocks, the input/output blocks, and the volatile memory block of the programmable logic device;
• a non-volatile memory block having a first section adapted to receive data from the volatile memory block prior to the reconfiguration for transfer back to the volatile memory block prior to entering a user mode of operation after the reconfiguration, wherein the non-volatile memory block further includes a second section adapted to store second configuration data to transfer to the configuration memory cells during the reconfiguration;
• and
• a control circuit adapted to control the transfer of the data between the non-volatile memory block and the volatile memory block to save the data during the reconfiguration and to control the transfer of the second configuration data from the non-volatile memory block to the configuration memory cells to reconfigure the programmable logic device.

A method of reconfiguring a programmable logic device, the method comprising:

• performing a background programming operation of the programmable logic device prior to a reconfiguring;
• transferring data from a volatile memory block to a non-volatile memory block prior to the reconfiguring;
• transferring the data from the non-volatile memory block to the volatile memory block during the reconfiguring such that the data is available within the volatile memory block after the reconfiguring;
• capturing input/output states prior to the reconfiguring to provide during the reconfiguring;
• copying configuration data from the non-volatile memory block to configuration memory for the reconfiguring;
• reconfiguring the programmable logic device;
• preserving at least one data value of a volatile memory during the reconfiguring;
• and
• providing a desired data value to the programmable logic device to precondition a register within a user logic area of the programmable logic device, prior to release of control to user-defined logic provided by the reconfiguring, such that the register provides the desired data value after the reconfiguring.