Back to results
US 7,459,928 B2Granted
Cell with fixed output voltage for integrated circuit
AssigneeNXP B.V.
InventorsPatrick Da Silva, Laurent Souef
Life of this patent
Estimating the term…
Abstract
The invention relates to a testable integrated circuit. In order to replace ground and VDD in certain points of such a circuit, the circuit comprises a cell (34) which comprises a flipflop (11) and means (31) able to set the output voltage of the cell when the circuit is in the operation mode. These means for setting the output voltage are controlled by a control signal (15) which depends on the mode signal that indicates whether the signal is in the test mode or in the operation mode.
Claims14
An integrated circuit comprising
- a cell having an output with a fixed output voltage when the integrated circuit is in an operation mode and having an input coupled to a control signal, the control signal depending on a mode signal that indicates whether the circuit is in the operation mode or in a test mode, said cell comprising a flip-flop and logic circuitry, responsive to the control signal, for setting the fixed output voltage when the circuit is in the operation mode, the flip-flop having an input coupled to the output of the cell.
An integrated circuit comprising
- a cell having an output with a fixed output voltage when the integrated circuit is in an operation mode and having an input coupled to a control signal, the control signal depending on a mode signal that indicates whether the circuit is in the operation mode or in a test mode, said cell including a flip-flop, responsive to the control signal, being operable to set the fixed output voltage when the circuit is in the operation mode, the flip-flop having an input coupled to the output of the cell.
An integrated circuit comprising
- a cell having an output with a fixed output voltage when the integrated circuit is in an operation mode and having an input coupled to a control signal, the control signal depending on a mode signal that indicates whether the circuit is in the operation mode or in a test mode, said cell including a flip-flop, responsive to the control signal, being operable to set the fixed output voltage when the circuit is in the operation mode, the flip-flop having an input coupled to the output of the cell, having an output corresponding to the output of the cell, and having an asynchronous reset-to-zero or an asynchronous set-to-one coupled to the control signal.
Dependencies are inferred from the claim text.