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US 7,459,778 B2Granted
Chip on board leadframe for semiconductor components having area array
AssigneeMicron Technology, Inc.
InventorsDalson Ye Seng Kim, Jeffrey Toh Tuck Fook, Lee Choon Kuan
Life of this patent
Estimating the term…
Abstract
A leadframe for semiconductor components includes leadfingers, interconnect bonding sites for wire bonding to a semiconductor die, terminal bonding sites for terminal contacts for the component in an area array, and bus bars which electrically connect selected leadfingers to one another. The interconnect bonding sites are located on the leadframe relative to the bus bars such that shorting to the bus bars by wire interconnects is eliminated.
Claims28
A leadframe strip for fabricating a plurality of semiconductor components comprising:
- a plurality of leadframes separated by connecting segments, each leadframe configured to fabricate a component having a semiconductor die, the connecting segments configured for removal to separate the components;
- each leadframe comprising:
- a plurality of leadfingers having first sides and opposing second sides, the leadfingers forming a die mounting site on the first sides configured for attaching a back side of the die;
- a plurality of first bonding sites on the first sides of the leadfingers configured for forming interconnects to a circuit side of the die;
- a plurality of second bonding sites on the second sides of the leadfingers in an area array configured for forming terminal contacts for the component;
- and
- a plurality of bus bars separate from the connecting segments configured to electrically connect selected second bonding sites in the component, the bus bars at least partially forming the die mounting site and configured for contact with the back side of the die such that the die can be located between the bus bars and the interconnects in the component to prevent shorting between the bus bars and the interconnects in the component.
4 more elements
A leadframe strip for fabricating a plurality of semiconductor components comprising:
- a plurality of leadframes separated by connecting segments, each leadframe configured to fabricate a component having a semiconductor die, the connecting segments configured for removal to separate the components;
- each leadframe comprising:
- a plurality of leadfingers having first sides, opposing second sides, inner portions and outer peripheries, the inner portions forming a die mounting site for a back side of the semiconductor die;
- a plurality of bus bars proximate to the inner portions separate from the connecting segments electrically connecting selected leadfingers;
- a plurality of interconnect bonding sites on the leadfingers on the first sides located proximate to the outer peripheries configured for bonding interconnects to the leadfingers and to a circuit side of the die, the die mounting site and the bus bars configured such that the die substantially covers the bus bars in the component and can be located between the bus bars and the interconnects in the component to prevent shorting between the bus bars and the interconnects;
- and
- a plurality of terminal bonding sites on the leadfingers on the second sides in an area array.
4 more elements
A leadframe strip for fabricating a plurality of semiconductor components comprising:
- a plurality of leadframes separated by connecting segments, each leadframe configured to fabricate a component having a semiconductor die, the connecting segments configured for removal to separate the components;
- each leadframe comprising:
- a plurality of leadfingers comprising first sides, opposing second sides, tip portions configured to form a die mounting site on the first sides for attaching a back side of the die, a plurality of interconnect bonding sites on the first sides outside of the die mounting site configured for bonding interconnects to the leadfingers and to a circuit side of the die, a plurality of terminal bonding sites on the second sides in an area array and a plurality of bus bars separate from the connecting segments on selected tip portions electrically connecting selected leadfingers;
- the bus bars configured to electrically connect selected terminal bonding sites and selected interconnect bonding sites as well in the component, the bus bars at least partially forming the die mounting site such that the die substantially covers the bus bars and can be located between the bus bars and the interconnects in the component to prevent [s] shorting between the bus bars and the interconnects in the component.
1 more element
Dependencies are inferred from the claim text.