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US 7,459,746 B2Granted
Method of forming inside rough and outside smooth HSG electrodes and capacitor structure
AssigneeMicron Technology, Inc.
InventorLingyi A. Zheng
Life of this patent
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AssigneeMicron Technology, Inc.
InventorLingyi A. Zheng
Estimating the term…
A container capacitor and method of forming the container capacitor are provided. The container capacitor comprises a lower electrode fabricated by forming a layer of doped polysilicon within a container in an insulative layer disposed on a substrate; forming a barrier layer over the polysilicon layer within the container; removing the insulative layer to expose the polysilicon layer outside the container; nitridizing the exposed polysilicon layer at a low temperature, preferably by remote plasma nitridation; removing the barrier layer to expose the inner surface of the polysilicon layer within the container; and forming HSG polysilicon over the inner surface of the polysilicon layer. The capacitor can be completed by forming a dielectric layer over the lower electrode, and an upper electrode over the dielectric layer. The cup-shaped bottom electrode formed within the container defines an interior surface comprising HSG polysilicon, and an exterior surface comprising smooth polysilicon.
An intermediate capacitor structure, comprising a lower electrode comprising polysilicon in an opening in an insulative layer, the lower electrode having an inner surface comprising HSG polysilicon, and an outer surface comprising smooth polysilicon, the HSG polysilicon on the inner surface exposed, a nitride layer of about 15-25 Å over the outer surface but not the inner surface, and an opening between the electrode and an adjacent electrode with the nitride layer exposed within said opening.
An intermediate semiconductor device, comprising a plurality of capacitors, each capacitor in an opening in an insulative layer and comprising a lower electrode having an inner surface comprising HSG polysilicon and an outer surface comprising smooth polysilicon, the HSG polysilicon on the inner surface exposed, and a nitride layer of about 15-25 Å over the outer surface but not the inner surface, and an opening between adjacent capacitors with the nitride layer exposed within said opening.
An intermediate capacitor structure, comprising an electrode in an opening in an insulative layer, the electrode comprising an interior surface and an exterior surface, the interior surface exposed and comprising HSG polysilicon and the exterior surface comprising smooth polysilicon with a nitride layer over the exterior surface but not the interior surface, the nitride layer exposed within an opening between the electrode and an adjacent electrode.
An intermediate capacitor structure, comprising an electrode in an opening within an insulative layer, the electrode comprising an interior surface being exposed and comprising HSG polysilicon, and a second opposing exterior surface adjacent to the insulative layer and comprising smooth polysilicon with a nitride layer over the exterior surface but not the interior surface and exposed within an opening between the electrode and an adjacent electrode.
An intermediate structure for a semiconductor device, comprising a capacitor comprising a cup-shaped electrode in a container within an insulative layer, the electrode comprising an interior surface comprising HSG polysilicon, and an exterior surface adjacent the insulative layer and comprising smooth polysilicon, the interior surface exposed, and the exterior surface with a nitride layer over the exterior surface but not the interior surface and exposed within an opening between the electrode and an adjacent electrode.
An intermediate structure for a double-sided container capacitor, comprising a cup-shaped lower electrode comprising polysilicon and defining an interior roughened surface comprising HSG polysilicon and an exterior smooth surface comprising doped polysilicon, the HSG polysilicon on the interior surface exposed, and a nitride passivation layer of about 15-25 Å over the exterior surface but not the interior surface, and an opening between the electrode and an adjacent electrode with the nitride passivation layer exposed within said opening.
An intermediate semiconductor device, comprising a plurality of capacitors, each capacitor in an opening in an insulative layer and comprising a lower electrode having an inner surface comprising HSG polysilicon and an outer surface comprising smooth polysilicon, the HSG polysilicon on the inner surface exposed, and a nitride layer over the outer surface but not the inner surface, and exposed within a recess within the insulative layer between adjacent capacitors, the recess extending to an etch stop layer underlying the insulative layer.
A semiconductor substrate, comprising an intermediate structure comprising:
A semiconductor substrate, comprising an intermediate structure comprising:
A semiconductor substrate, comprising an intermediate structure comprising:
A semiconductor substrate, comprising an intermediate structure comprising:
A semiconductor substrate, comprising an intermediate structure comprising:
A semiconductor substrate, comprising an intermediate structure comprising:
An intermediate capacitor structure, comprising:
An intermediate container capacitor structure, comprising:
An intermediate capacitor structure, comprising:
An intermediate capacitor structure, comprising:
An intermediate capacitor structure, comprising:
An intermediate capacitor structure, comprising:
An intermediate capacitor structure, comprising:
An intermediate capacitor structure, comprising:
Dependencies are inferred from the claim text.