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US 7,459,739 B2Granted
Double density MRAM with planar processing
AssigneeMicron Technology, Inc.
InventorsAllan T. Hurst, Jeffrey Sather, Jason B. Gadbois
Life of this patent
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Abstract
The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated magnetic memory structures. In one aspect, the present teachings relate to magnetic memory structure fabrication techniques in a high density configuration that includes an efficient means for programming high density magnetic memory structures.
Claims29
A memory array comprising:
- a first plurality of memory devices, each device comprising:
- a substrate;
- a first memory layer having a first memory structure formed on the substrate, wherein the first memory layer further includes a first plurality of electrodes in electrical contact with an underside of the first memory structure, wherein the first memory structure is configured to store a first logic state therein by selective magnetization of the first memory structure;
- and
- at least a second memory layer having a second memory structure formed above the substrate in a manner so as to overlie the first memory layer, wherein the second memory layer further includes a second plurality of electrodes in separate electrical contact with an underside of the second memory structure, wherein the second memory structure is configured to store a second logic state therein by selective magnetization of the second memory structure, and wherein the second memory layer increases the storage density of the array;
- and
- a plurality of word lines interposed between the first and second memory layers and insulated from the first and second memory structures, each word line arranged to extend proximate to the first and the second memory structures such that application of current to the word lines can alter a magnetic state of the first and the second memory structures.
4 more elements
A memory array comprising:
- a substrate;
- a first memory layer having first memory structures formed on the substrate, wherein the first memory layer further includes a first plurality of electrodes in electrical contact with one of an upper or a lower surface of associated first memory structures, wherein the first memory structures are configured to store first logic states therein by selective magnetization of the first memory structures;
- and
- at least a second memory layer having second memory structures formed above the substrate in a manner so as to overlie the first memory layer, wherein the second memory layer further includes a separate second plurality of electrodes in electrical contact with an opposite lower or upper surface of associated second memory structures, wherein the second memory structures are configured to store second logic states therein by selective magnetization of the second memory structures;
- and
- a plurality of word lines interposed between the first and second memory layers and arranged to extend adjacent the first and the second memory structures and insulated from the first and second memory structures such that application of current to the word lines can alter a magnetic state of adjacent first and second memory structures.
3 more elements
A memory array comprising:
- a substrate;
- first memory structures formed on the substrate;
- a first plurality of electrodes in electrical contact with associated first memory structures, wherein the first memory structures are configured to store first logic states therein by selective magnetization of the first memory structures;
- at least second memory structures formed above the substrate in a manner so as to overlie the first memory structures;
- a separate second plurality of electrodes in electrical contact with associated second memory structures, wherein the second memory structures are configured to store second logic states therein by selective magnetization of the second memory structures and wherein each second memory structure is substantially vertically aligned with a corresponding first memory structure;
- and
- a plurality of word lines interposed between the first and second memory structures and arranged to extend adjacent the first and the second memory structures and insulated from the first and second memory structures such that application of current to the word lines can alter a magnetic state of adjacent first and second memory structures.
4 more elements
Dependencies are inferred from the claim text.