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US 7,459,392 B2Granted
Noble metal barrier and seed layer for semiconductors
AssigneeIntel Corporation
InventorsSteven W. Johnston, Juan E. Dominguez, Michael L. McSwiney
Life of this patent
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Abstract
A barrier and seed layer for a semiconductor damascene process is described. The seed layer is formed from a noble metal with an intermediate region between the barrier and noble metal layers to prevent oxidation of the barrier layer.
Claims9
A method in the fabrication of a semiconductor device comprising:
- forming, on an inter-layer dielectric (ILD) layer, a barrier layer with a precursor which is reduced with a nitrogen-free gas;
- and, without adding nitrogen to the barrier layer,
- forming an intermediate noble metal carbide, noble metal nitride or noble metal silicide region on the barrier layer using a noble metal precursor and a reactant, wherein the barrier layer protects the ILD layer from the reactant;
- and
- forming a noble metal layer on the intermediate noble metal carbide, noble metal nitride or noble metal silicide region.
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A method for forming a barrier and seed layer comprising:
- introducing into a chamber a barrier metal precursor and a first reactant which is nitrogen-free to form a nitrogen-free barrier layer;
- and, without adding nitrogen, introducing into the chamber a first noble metal precursor and a second reactant so as to produce a noble metal carbide, a noble metal nitride or a noble metal silicide region on the nitrogen-free barrier layer;
- and
- introducing a second noble metal precursor into the chamber so as to form a noble metal layer on the noble metal carbide, the noble metal nitride or the noble metal silicide region.
1 more element
Dependencies are inferred from the claim text.