Method of fabricating semiconductor memory device having plurality of storage node electrodes

A method of fabricating a semiconductor memory device, the method comprising:

• forming a mold insulating film over first and second portions of a semiconductor substrate, the mold insulating film comprising a plurality of storage node electrode holes spaced apart over the first portion of the semiconductor substrate;
• forming a plurality of storage node electrodes on inner surfaces of the storage node electrode holes, respectively;
• forming a capping film which covers the storage node electrodes and a first portion of the mold insulating film located over the first portion of the semiconductor substrate, and which exposes a second portion of the mold insulating film located over the second portion of the semiconductor substrate;
• selectively removing the second portion of the mold insulating film exposed by the capping film to a predetermined depth with respect to the capping film to expose a part of a sidewall of the first portion of the mold insulating film covered by the capping film, and then wet etching the mold insulating film to expose a sidewall of at least one storage node electrode among the storage node electrodes covered by the capping film;
• and
• removing the capping film by dry etching to expose upper portions of the storage node electrodes.

A method of forming a semiconductor memory device, the method comprising:

• forming an interlayer insulating film over a semiconductor substrate in which a cell region and a peripheral region are defined, the interlayer insulating film comprising a plurality of contact plugs located over the cell region of the semiconductor substrate;
• forming a mold insulating film over the interlayer insulating film, the mold insulating film comprising a plurality of storage node electrode holes which expose at least portions of the contact plugs, respectively;
• forming a plurality of storage node electrodes on inner surfaces of the storage node electrode holes, respectively, the storage node electrodes being spaced apart from each other and electrically connected to the respective contact plugs;
• forming a capping film which covers the storage node electrodes and a first portion of the mold insulating film located over the cell region of the semiconductor substrate, and which exposes a second portion of the mold insulating film located over the peripheral region of the semiconductor substrate;
• selectively removing, including wet etching, the mold insulating film to expose a sidewall of at least one storage node electrode among the storage node electrodes covered by the capping film;
• and
• after removing the mold insulating film, removing the capping film to expose upper portions of the storage node electrodes.

A method of fabricating a semiconductor memory device, the method comprising:

• forming an interlayer insulating film over a semiconductor substrate in which a cell region and a peripheral region are defined, the interlayer insulating film comprising a plurality of contact plugs located over the cell region of the semiconductor substrate;
• forming a mold insulating film over the interlayer insulating film, the mold insulating film comprising a plurality of storage node electrode holes which expose at least portions of the contact plugs, respectively;
• forming a plurality of storage node electrodes on inner surfaces of the storage node electrode holes, respectively, the storage node electrodes being spaced apart from each other and electrically connected to the respective contact plugs;
• etching the mold insulating film to a depth which exposes portions of sidewalls of the storage node electrodes protruding above the etched mold insulating film;
• forming a capping film which covers the storage node electrodes and a first portion of the etched mold insulating film located over the cell region of the semiconductor substrate, and which exposes a second portion of the etched mold insulating film located over the peripheral region of the semiconductor substrate;
• selectively removing, including wet etching, the mold insulating film to expose a sidewall of at least one storage node electrode among the storage node electrodes covered by the capping film;
• and
• removing the capping film by dry etching to expose upper portions of the storage node electrodes.

A method of fabricating a semiconductor memory device, the method comprising:

• forming an interlayer insulating film over a semiconductor substrate in which a cell region and a peripheral region are defined, the interlayer insulating film comprising a plurality of contact plugs located over the cell region of the semiconductor substrate;
• forming a mold insulating film over the interlayer insulating film, the mold insulating film comprising a plurality of storage node electrode holes which expose at least portions of the contact plugs, respectively;
• forming a plurality of storage node electrodes on inner surfaces of the storage node electrode holes, respectively, the storage node electrodes being spaced apart from each other and electrically connected to the respective contact plugs;
• forming a capping film which covers the storage node electrodes and a first portion of the mold insulating film located over the cell region of the semiconductor substrate, and which exposes a second portion of the mold insulating film located over the peripheral region of the semiconductor substrate;
• forming a plurality of contact holes which penetrate the capping film and at least an upper part of the first portion of the mold insulating film, and which are located between at least some of the storage node electrodes;
• selectively removing, including wet etching, the mold insulating film having the contact holes formed therein to expose a sidewall of at least one storage node electrode among the storage node electrodes covered by the capping film;
• and
• removing the capping film by dry etching to expose upper portions of the storage node electrodes.

A method of fabricating a semiconductor memory device, the method comprising:

• forming an interlayer insulating film over a semiconductor substrate in which a cell region and a peripheral region are defined, the interlayer insulating film comprising a plurality of contact plugs located over the cell region of the semiconductor substrate;
• forming an etch stop film over the interlayer insulating film, the etch stop film exposing at least portions of the contact plugs;
• forming a mold insulating film over the etch stop film, the mold insulating film comprising a plurality of storage node electrode holes which expose at least portions of the contact plugs, respectively;
• forming a plurality of storage node electrodes on inner surfaces of the storage node electrode holes, respectively, the storage node electrodes being spaced apart from each other and electrically connected to the respective contact plugs;
• etching the mold insulating film to a depth which exposes portions of sidewalls of the storage node electrodes protruding above the etched mold insulating film;
• forming a capping film which covers the storage node electrodes and a first portion of the etched mold insulating film located over the cell region of the semiconductor substrate, and which exposes a second portion of the etched mold insulating film located over the peripheral region of the semiconductor substrate;
• forming a plurality of contact holes which penetrate the capping film and at least an upper part of the first portion of the mold insulating film, and which are located between at least some of the storage node electrodes;
• selectively removing, including wet etching, the mold insulating film having the contact holes formed therein to expose a sidewall of at least one storage node electrode among the storage node electrodes covered by the capping film;
• and
• removing the capping film by dry etching to expose upper portions of the storage node electrodes.