Method of forming a stack of semiconductor packages

A method of forming a stack of semiconductor packages comprising:

• coupling a semiconductor die to a first side surface of a substrate, the first side surface comprising metal first circuit patterns, wherein each of the first circuit patterns includes a respective one of a plurality of first pads, and the first pads are aligned into at least two parallel rows;
• covering the semiconductor die and a portion of the first side surface of the substrate with an enclosure without covering any of the first pads, wherein the enclosure has opposed parallel substantially vertical first and second sidewalls, wherein each of the first and second sidewalls is immediately adjacent to and parallel to a respective one of the rows of the first pads;
• forming a plurality of layers of a solder on the first pads, wherein each of the layers of the solder has an exposed exterior surface portion that faces in a same direction as the first side surface of the substrate, and
• wherein a lateral distance “a” between immediately adjacent ones of the first pads, a lateral distance “b” between each of the first and second sidewalls and the first pads of the row immediately adjacent to the respective sidewall, a vertical distance “c” between the first side surface and an uppermost portion of the exterior surface portion of each of the layers of the solder, and a vertical distance “d” between the first side surface and an uppermost edge of each of the first and second sidewalls of the enclosure are selected so that a>b and c<d.