Acyclic modeling of combinational loops
AssigneeMentor Graphics Corporation
InventorsAmit Gupta, Charles W. Selvidge
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Abstract
Aspects of the present invention are directed to converting non-oscillatory combinational loops into acyclic circuits. Combinational loops may be modeled as state-holding elements where non-oscillatory loops are broken using edge-sensitive latches. In addition to providing a way to model combinational loops originally consisting only of gates (i.e., without originally including any state-holding elements), loops that have paths through user latches may also be converted. The presented methodology may be used with both small and large loops.
Claims15
A method for converting a combinational loop in a circuit design into an acyclic circuit, comprising:
- sending first data representing the combinational loop;
- and
- receiving second data representing an acyclic path including at least one added state-holding element, the acyclic path being functionally equivalent to the combinational loop,
- wherein the second data is generated by determining whether the combinational loop is monotonic and, responsive to a determination that the combinational loop is monotonic, transforming the combinational loop into the acyclic path by adding the at least one state-holding element, and
- wherein determining whether the combinational boy is monotonic comprises
- determining a function F(I), a function G(I), and a function B(I), wherein I represents at least one non-cyclic input to the loop, such that A =(F(I) AND A) OR (G(I) AND INV(A)) OR B(I), and wherein A represents a first output of the loop,
- determining whether G(I) is zero or nonzero, and
- determining that the combinational loop is mono tonic based on a determination that G(I) is zero.
A computer-assisted method for converting a combinational loop in a circuit design into an acyclic circuit, comprising:
- synthesizing the combinational loop from a higher-level design description using an automated synthesis tool;
- determining whether the combinational loop is monotonic by:
- determining a function F(I), a function G(I), and a function B(I), wherein I represents at least one non-cyclic input to the loop, such that A =(F(I) AND A) OR (G(I) AND INV(A)) OR B(I), and wherein A represents a first output of the loop, and
- determining whether G(I) is zero or nonzero,
- determining that the combinational loop is mono tonic based on a determination that G(I) is zero;
- and
- responsive to a determination that the combinational loop is monotonic, transforming the combinational loop into an acyclic path having at least one state-holding element.
A computer-readable medium storing computer-executable instructions for converting a combinational loop in a circuit design into an acyclic circuit, the instructions defining steps including:
- determining whether the combinational loop is monotonic by:
- determining a function F(I), a function G(I), and a function B(I), wherein I represents at least one non-cyclic input to the loop, such t at A =(F(I) AND A) OR (G(I) AND INV(A)) OR B(I), and wherein A represents a first output of the loop,
- determining whether G(I) is zero or nonzero,
- determining that the combinational loop is monotonic based on a determination that G(I) is zero;
- and
- responsive to a determination that the combinational loop is monotonic, transforming the combinational loop into an acyclic path by adding at least one state-holding element.
Dependencies are inferred from the claim text.