Scan stream sequencing for testing integrated circuits
AssigneeCredence Systems Corporation
InventorsJamie S. Cullen, Burnell G. West
Life of this patent
Estimating the term…
Loading patent…
AssigneeCredence Systems Corporation
InventorsJamie S. Cullen, Burnell G. West
Estimating the term…
A system and method for processing scan data for integrated circuit testing. Scan data is divided into three groups of scan data segments: scan-in data segments, scan-out data segments and scan-mask data segments. The sequence of scan data segments in each group constitutes the operative test data in a scan stream. Each scan stream is represented by a table having a row corresponding to each scan data segment in the stream. Each row has four fields: a start address, a segment length, a start pad length and an end pad length. Scan streams consist of the bit sequence of segment data interposed by dummy data corresponding in length to the start pad and end pad lengths. Scan streams are interleaved by using the pad lengths to time the processing of scan data segments.
A scan sequencing module for an integrated circuit tester, the scan sequencing module comprising:
A scan sequencing module for an integrated circuit tester, the scan sequencing module comprising:
Dependencies are inferred from the claim text.