Method and circuitry for debugging/updating ROM
AssigneeTian Holdings, LLC
InventorsStanley Liow, Kobe Chou, Vincent Lin
Life of this patent
Estimating the term…
Abstract
A read only memory circuit for debugging and updating, the circuit includes read only memory, debug program memory, program counter, and compare and load unit. In the circuit, the compare and load unit detects instruction-read-memory-address from the program counter. If the instruction-read-memory-address is a predetermined main program address, the compare and load unit serves to transmit a debug address in the debug program memory to the program counter to update the original instruction-read-memory-address for debugging.
Claims20
A read only memory (ROM) circuit, comprising:
- a ROM, wherein a memory space of the ROM comprises at least a predetermined main program address;
- a debug program memory (DPM), wherein a memory space of the DPM comprises at least a predetermined debug/update program address;
- a program counter (PC), for generating an instruction-read-memory-address of a next instruction;
- and
- a compare-load unit, coupled to the PC, wherein when the instruction-read-memory-addresses matches with one of the predetermined main program addresses, the compare-load unit changes the instruction-read-memory-address generated by the PC to one of the predetermined debug/update program addresses.
A debug method for handling a read only memory (ROM), suitable for a system comprising a program counter (PC), where a memory space of the ROM comprises at least a predetermined main program address, and the PC generates an instruction-read-memory-address of a next instruction for the system, the debug method comprising:
- providing a debug program memory (DPM), wherein a memory space of the DPM comprises at least a predetermined debug/update program address;
- and
- changing the instruction-read-memory-address generated by the PC to a predetermined debug/update program address when the instruction-read-memory-address matches with the predetermined main program address.
A computer-readable storage medium storing computer-executable instructions that, when executed, perform a method for enabling debugging of a read only memory (ROM), the method comprising:
- receiving a next instruction address generated by a program counter;
- determining whether the generated next instruction address is identified for debugging;
- when the generated next instruction address is identified for debugging, replacing the generated address with an alternate address stored in a debug program memory so that a processor that is to execute an instruction located at the generated next instruction address instead executes an instruction stored in the alternate address.
An apparatus for enabling debugging of a read only memory (ROM), comprising:
- a memory means for storing a debug/update program address;
- a counter means for generating an instruction-read-memory-address of a next instruction;
- and
- a comparing means coupled to the counter means for causing execution of an instruction stored at the stored debug/update program address when the generated instruction-read-memory-address is identified for debugging.
Dependencies are inferred from the claim text.