Microcontroller having a system resource prescaler thereon
AssigneeFujitsu Limited
InventorNobuhiko Akasaka
Life of this patent
Estimating the term…
Abstract
A microcontroller operating in synchronization with clock includes: an arithmetic unit operating in synchronization with the clock; an internal resource being connected to the arithmetic unit via a bus, and having at least a bus interface, and an internal circuit operating in synchronization with the clock; and a system resource prescaler which generates from the clock an operation permission signal denoting an operation permission state in m cycles out of n cycles of the clock (m=<n), and supplies the operation permission signal to the internal circuit of the internal resource. The above-mentioned internal circuit operates in synchronization with the clock when the operation permission signal denotes the operation permission state.
Claims12
A microcontroller operating in synchronization with a clock, comprising:
- an arithmetic unit operating in synchronization with the clock;
- an internal resource connected to the arithmetic unit via a bus, and having at least a bus interface and an internal circuit both of which operate in synchronization with the clock;
- and
- a system resource prescaler which generates, from the clock, an operation permission signal denoting an operation permission state in m cycles out of n cycles of the clock (m=<n), and supplies the operation permission signal to the internal circuit of the internal resource,
- wherein the internal circuit of the internal resource operates in synchronization with the clock when the operation permission signal denotes the operation permission state and the bus interface of the internal resource performs a bus management with the arithmetic unit in synchronization with the clock regardless of the state of the operation permission signal.
The microcontroller operating in synchronization with a clock, comprising:
- an arithmetic unit operating in synchronization with the clock;
- an internal resource being connected to the arithmetic unit via a bus, and having at least a bus interface and an internal circuit both of which operates in synchronization with the clock;
- and
- a system resource prescaler which generates, from the clock, an operation permission signal denoting an operation permission state in m cycles out of n cycles of the clock (m=<n), and supplies the operation permission signal to the internal circuit of the internal resource,
- wherein the internal circuit operates in synchronization with the clock when the operation permission signal denotes the operation permission state,
- wherein the system resource prescaler comprises a preceding-stage prescaler and a succeeding-stage prescaler which generates a succeeding-stage operation permission signal using a preceding-stage operation permission signal which is generated and supplied from the preceding-stage prescaler, and the succeeding-stage operation permission signal is supplied to the internal circuit of the internal resource.
A microcontroller operating in synchronization with a clock, comprising:
- an arithmetic unit operating in synchronization with the clock;
- an internal resource being connected to the arithmetic unit via a bus, and having at least a bus interface and an internal circuit both of which operate in synchronization with the clock;
- and
- a system resource prescaler which generates, from the clock, an operation permission signal having a lower frequency than the clock, and supplies the operation permission signal to the internal circuit of the internal resource,
- wherein the internal circuit of the internal resource operates in synchronization with the clock when the operation permission signal denotes the operation permission state and the bus interface of the internal resource performs a bus management with the arithmetic unit in synchronization with the clock regardless of the state of the operation permission signal.
Dependencies are inferred from the claim text.