US 7,454,580 B2 · Data processing system, processor and method of data processing that reduce store queue entry utilization for synchronizing operations

Abstract

A data processing system includes a processor core and a memory subsystem. The memory subsystem includes a store queue having a plurality of entries, where each entry includes an address field for holding the target address of store operation, a data field for holding data for the store operation, and a virtual sync field indicating a presence or absence of a synchronizing operation associated with the entry. The memory subsystem further includes a store queue controller that, responsive to receipt at the memory subsystem of a sequence of operations including a synchronizing operation and a particular store operation, places a target address and data of the particular store operation within the address field and data field, respectively, of an entry in the store queue and sets the virtual sync field of the entry to represent the synchronizing operation, such that a number of store queue entries utilized is reduced.

Claims19

Dependent claims

A data processing system, comprising:

a processor core;
and
a memory subsystem coupled to the processor core, said memory subsystem including:
a store queue having a plurality of entries, wherein each of said plurality of entries includes an address field for holding the target address of store operation, a data field for holding data for the store operation, and a virtual sync field indicating a presence or absence of a synchronizing operation associated with said entry;
and
store queue controller, responsive to receipt at the memory subsystem of a sequence of operations including a synchronizing operation and a particular store operation, places a target address and data of the particular store operation within the address field and data field, respectively, of an entry in the store queue and sets the virtual sync field of the entry to represent said synchronizing operation, such that a number of store queue entries utilized is reduced.

3 more elements

A memory subsystem for a data processing system, said memory subsystem comprising:

a store queue coupled to receive a sequence of operations from a processor core of the data processing system, said store queue having a plurality of entries, wherein each of said plurality of entries includes an address field for holding the target address of store operation, a data field for holding data for the store operation, and a virtual sync field indicating a presence or absence of a synchronizing operation associated with said entry;
and
store queue controller, responsive to receipt at the memory subsystem of a sequence of operations including a synchronizing operation and a particular store operation, places a target address and data of the particular store operation within the address field and data field, respectively, of an entry in the store queue and sets the virtual sync field of the entry to represent said synchronizing operation, such that a number of store queue entries utilized is reduced.

A method of data processing in a data processing system, said method comprising:

a processor core executing store instructions to determine target memory addresses of store operations to be performed by a memory subsystem of the data processing system;
dispatching a sequence of operations including a synchronizing operation and a store operation to a store queue of the memory subsystem;
enqueuing within an entry of the store queue a target address and data for the store operation and setting a virtual sync field of the entry to indicate the association of a synchronizing operation with said entry;
and
thereafter, performing a synchronization indicated by the synchronizing operation and memory access indicated by the store operation and deallocating the entry, wherein a number of store queue entries utilized for synchronizing operations is reduced.

2 more elements

Dependencies are inferred from the claim text.

Data processing system, processor and method of data processing that reduce store queue entry utilization for synchronizing operations

Life of this patent

Data processing system, processor and method of data processing that reduce store queue entry utilization for synchronizing operations

Life of this patent

Abstract

Claims19