Bit synchronization detection methods and systems
AssigneeMediatek Incorporation
InventorsChun-Nan Chen, Kun-Tso Chen
Life of this patent
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Abstract
Methods and systems for detecting bit synchronization boundary in a received signal. A counter is set for defining a bit boundary of the received signal. Transitions in the received signal are detected and compared with the counter value as the transitions are expected to occur only at the bit boundary. The bit boundary is confirmed if a preset number of transitions aligned with the bit boundary.
Claims23
A method for detecting bit synchronization boundary in a received signal, comprising:
- detecting transitions in the received signal;
- initiating a counter periodically counting from 1 to M when detecting a first transition, wherein M is a positive integer;
- checking bit alignment by comparing actual time of a subsequent transition to expected time, wherein the expected time is determined according to the counter;
- when the bit alignment check fails, restart counting the counter until detecting another transition;
- establishing a bit boundary if the bit alignment check is successful;
- confirming the bit boundary by repeatedly performing the bit alignment check for a predetermined number of times;
- and
- extracting data bits in the received signal in accordance with the confirmed bit boundary.
A system for bit synchronization boundary detection in a received signal, comprising:
- a transition detector, detecting transitions in the received signal;
- a counter, periodically counting from 1 to M when the transition detector detects a first transition, wherein M is a positive integer;
- a processor coupled to the transition detector and the counter, checking bit alignment by comparing actual time of a subsequent transition to expected time, establishing a bit boundary if the bit alignment check is success, and generating a confirmed bit boundary by performing the bit alignment check for a predetermined number of times;
- and
- a bit generator coupled to the processor, extracting data bits in the received signal according to the confirmed bit boundary output from the processor;
- wherein the processor determines the expected time according to the counter output, and if the bit alignment check fails, the counter restarts counting from 1 until detecting another transition.
A receiver for extracting data bits in a received signal, comprising:
- a carrier oscillator, generating a carrier frequency;
- a carrier mixer, converting the received signal from intermediate frequency (IF) to baseband frequency by mixing the received signal with the carrier frequency;
- a code generator, generating a code sequence;
- a code mixer, de-spreading the received signal output from the carrier mixer according to the code sequence;
- an accumulator, accumulating the received signal output from the code mixer over the duration of the code sequence;
- and
- a data extractor coupled to the output of the accumulator, detecting transitions in the received signal, establishing a bit boundary by counting the duration between two successive transitions and checking if the counted duration is valid, confirming the bit boundary by performing the bit alignment check for a predetermined number of times, and extracting the data bits in the received signal according to the confirmed bit boundary.
Dependencies are inferred from the claim text.