Memory cell with high-K antifuse for reverse bias programming
AssigneeSanDisk 3D LLC
InventorJames M. Cleeves
Life of this patent
Estimating the term…
Abstract
An integrated circuit and associated method of programming are provided. Such integrated circuit includes a memory cell with a diode and an antifuse in communication with the diode. The antifuse is constructed to include a high-K dielectric material with a K greater than 3.9. Further, the memory cell is programmed utilizing a programming pulse that reverse biases the diode thereof.
Claims34
An integrated circuit, comprising:
- a memory cell including:
- a diode, and
- an antifuse in communication with the diode and disposed vertically above or below the diode;
- wherein the antifuse includes a high-K dielectric material with a K greater than 3.9;
- wherein the memory cell is programmed utilizing a programming pulse that reverse biases the diode thereof.
A method for programming memory, comprising:
- applying a programming pulse to a memory cell including a diode and an antifuse in communication with the diode and disposed vertically above or below the diode;
- wherein the antifuse includes a high-K dielectric material with a K greater than 3.9;
- wherein the programming pulse reverse biases the diode of the memory cell.
A method for programming memory, comprising:
- applying a programming pulse to a memory cell including a diode and an antifuse in communication with the diode;
- wherein the antifuse includes a high-K dielectric material with a K greater than 3.9;
- wherein the programming pulse reverse biases the diode of the memory cell;
- wherein the memory cell is programmed in one of a plurality of available memory states;
- wherein the memory cell is programmed in more than one memory state by applying different soaking pulses to the memory cell which forward bias the diode of the memory cell.
A method for programming memory, comprising:
- applying a programming pulse to a memory cell including a diode and an antifuse in communication with the diode;
- wherein the antifuse includes a high-K dielectric material with a K greater than 3.9;
- wherein the programming pulse reverse biases the diode of the memory cell;
- and further comprising applying a first soaking pulse to the diode of the memory cell, and applying a second soaking pulse different from the first soaking pulse to a diode of another memory cell.
A method for programming memory, comprising:
- applying a programming pulse to a memory cell including a diode and an antifuse in communication with the diode;
- wherein the antifuse includes a high-K dielectric material with a K greater than 3.9;
- wherein the programming pulse reverse biases the diode of the memory cell;
- wherein programming pulses are applied to a plurality of memory cells simultaneously.
A monolithic integrated circuit, comprising:
- a monolithic three-dimensional array of memory cells including a plurality of word lines and a plurality of bit lines, the three-dimensional array of memory cells having more than one level of the word lines or more than one level of the bit lines;
- wherein at least one of the memory cells includes:
- a diode, and
- an antifuse in communication with the diode and disposed vertically above or below the diode;
- wherein the antifuse includes a high-K dielectric material with a K greater than 3.9;
- wherein the at least one memory cell is programmed utilizing a programming pulse that reverse biases the diode thereof.
Dependencies are inferred from the claim text.