Sample and hold memory sense amplifier

A method for refreshing a data bit on a bit line using a sense amplifier coupled to the bit line in a memory circuit, the method comprising:

• detecting a reference voltage on the bit line when the bit line is precharged in preparation for sensing a signal representing the data bit;
• holding the detected reference voltage using a capacitor;
• detecting a signal voltage being an amplitude of the signal representing the data bit;
• and
• amplifying a difference between the signal voltage and the detected reference voltage held on the capacitor.

A method for refreshing a data bit on a bit line using a sense amplifier coupled to the bit line in a memory circuit, the method comprising:

• detecting a reference voltage on the bit line before the data bit is written onto the bit line;
• holding the detected reference voltage using a capacitor;
• detecting a signal voltage on the bit line after the data bit is written onto the bit line;
• and
• amplifying a difference between the signal voltage and the reference voltage.

A sense amplifier coupled to a bit line in a memory circuit, the sense amplifier comprising:

• means for detecting a reference voltage on the bit line when the sense amplifier is reset and a signal voltage on the bit line after a data bit is written onto the bit line, the signal voltage being an amplitude of a signal representing the data bit, the reference voltage being a voltage to which the bit line is precharged in preparation for sensing the signal representing the data bit;
• means for amplifying a difference between the signal voltage and the reference voltage, including a differential amplifier including first and second differential inputs and first and second differential outputs;
• and
• means for compensating for a voltage offset between the first and second differential outputs associated with at least one mismatch of transistor characteristics in the differential amplifier.