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US 7,453,748 B2Granted
DRAM bit line precharge voltage generator
AssigneeElite Semiconductor Memory Technology Inc.
InventorChien Yi Chang
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AssigneeElite Semiconductor Memory Technology Inc.
InventorChien Yi Chang
Estimating the term…
A DRAM bit line precharge voltage generator comprises a first amplifier having a first current source and comparing a first voltage with a precharge voltage to control a first PMOS transistor, a second amplifier having a second current source and comparing a second voltage with the precharge voltage to control a second PMOS transistor, a third amplifier having a third current source and comparing a third voltage with the precharge voltage to control a first NMOS transistor, and a fourth amplifier having a fourth current source and comparing the first voltage with the precharge voltage to control a second NMOS transistor. The precharge voltage feedbacks from an output node connected between the second PMOS transistor and the first NMOS transistor. The DRAM bit line precharge voltage generator with a low-frequency pole provided by the first amplifier, the first PMOS transistor, the fourth amplifier, and the second NMOS transistor exhibits the characteristics of robustness, low standby current and low-output impedance.
A DRAM bit line precharge voltage generator, comprising:
A DRAM bit line precharge voltage generator, comprising:
A DRAM bit line precharge voltage generator, comprising:
Dependencies are inferred from the claim text.