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US 7,453,734 B2Granted
Method and apparatus for fast programming of memory
AssigneeMacronix International Co., Ltd.
InventorsChung-Kuang Chen, Yi-Te Shih
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Abstract
Methods and apparatuses are disclosed for programming a page of nonvolatile memory cells across multiple nonvolatile memory cells accessed by multiple word lines.
Claims21
A method of operating a memory having a plurality of memory cells, comprising:
- programming, via a first word line, a first part of the memory cells;
- and
- programming, via a second word line, a second part of the memory cells at least partly during changing a word line voltage of the first word line from a first voltage to a second voltage;
- verifying, via the first word line, the first part of the memory cells after the programming of the first part and the second part of the memory cells;
- and
- verifying, via the second word line, the second part of the memory cells, at least partly during changing the word line voltage of the first word line from the second voltage to the first voltage.
3 more elements
A method of operating a memory integrated circuit having a plurality of memory cells, comprising:
- responsive to the memory integrated circuit receiving an instruction to program the plurality of memory cells, the memory integrated circuit performing the following:
- programming, via a first word line, a first part of the plurality of nonvolatile memory cells;
- and
- programming, via a second word line, a second part of the plurality of memory cells;
- verifying, via the first word line, the first part of the memory cells after the programming of the first part and the second part of the memory cells:
- and
- verifying, via the second word line, the second part of the memory cells, at least partly during changing the word line voltage of the first word line from a second voltage to a first voltage.
4 more elements
A memory integrated circuit, comprising:
- a memory array;
- and
- a plurality of word lines accessing the memory array;
- and
- logic responsive to receipt by the memory integrated circuit of a program instruction to program a plurality of memory cells on the memory array, by performing;
- programming, via at least a first word line and a second word line of the plurality of word lines, the plurality of memory cells accessed by the first word line and the second word line of the plurality of word lines;
- verifying, via the first word line, the first part of the plurality of memory cells after the programming of the first part and the second part of the plurality of memory cel1s;
- and
- verifying, via the second word line, the second part of the plurality of memory cells, at least partly during changing a word line voltage of the first word line from a second voltage to a first voltage.
6 more elements
A memory integrated circuit, comprising:
- a memory array;
- and
- a plurality of word lines accessing the memory array;
- and
- logic responsive to receipt by the memory integrated circuit of a program instruction to program a plurality of memory cells on the memory array, by performing:
- programming, via at least a first word line and a second word line of the plurality of word lines, the plurality of memory cells;
- verifying, via the first word line, the first part of the plurality of memory cells after the programming of the first part and the second part of the plurality of memory cells;
- and
- verifying, via the second word line, the second part of the plurality of memory cells, at least partly during changing a word line voltage of the first word line from a second voltage to a first voltage.
6 more elements
Dependencies are inferred from the claim text.