Method for fabricating a flip chip package

A flip chip packaging structure further comprising:

• an IC package substrate unit, wherein the surface of each IC package substrate unit comprises a plurality of connecting pads and the surface of each connecting pad partially disposes a metal bump;
• a first insulating layer with patterns formed on the IC package substrate unit and the connecting pads and a plurality of openings formed by partially exposing the upper surface of the connecting pads, wherein the width of the first insulating layer is equivalent to the width of the IC package substrate unit;
• a second insulating layer with patterns disposed over the surface of the first insulating layer, wherein the openings are partially exposed and the width of the second insulating layer is equivalent to the width of the IC package substrate unit;
• a conductive material disposed within each opening to fully cover the surface of the connecting pads and the metal bumps;
• and
• a chip, wherein the bottom surface of the chip further comprises a plurality of conductive bumps, such that the chip is mounted to the surface of the IC package substrate unit via the second insulating layer.