Electro-optical device and manufacturing method thereof
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Hisashi Ohtani, Setsuo Nakajima
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Abstract
A semiconductor device that uses a high reliability TFT structure is provided. The gate electrode of an n-channel type TFT is formed by a first gate electrode and a second gate electrode that covers the first gate electrode. LDD regions have portions that overlap the second gate electrode through a gate insulating film, and portions that do not overlap. As a result, the TFT can be prevented from degradation in an ON state, and it is possible to reduce the leak current in an OFF state.
Claims20
A semiconductor device comprising:
- a semiconductor layer formed over a substrate, wherein the semiconductor layer contains a channel forming region and a drain region with a lightly doped drain region interposed therebetween;
- a first gate electrode formed adjacent to the semiconductor layer with a gate insulating film interposed therebetween;
- and
- a second gate electrode covering a top surface and a side surface of the first gate electrode,
- wherein a side surface of the second gate electrode overlaps the lightly doped drain region, and
- wherein the side surface of the first gate electrode is aligned with a boundary between the channel forming region and the lightly doped drain region.
A semiconductor device comprising:
- a semiconductor layer formed over a substrate, wherein the semiconductor layer contains a channel forming region and a drain region with a lightly doped drain region interposed therebetween;
- a first gate electrode formed adjacent to the semiconductor layer with a gate insulating film interposed therebetween;
- and
- a second gate electrode covering a top surface and a side surface of the first gate electrode,
- wherein a side surface of the second gate electrode overlaps the lightly doped drain region,
- wherein a portion of a bottom surface of the second gate electrode is in contact with the gate insulating film, and
- wherein the side surface of the first gate electrode is aligned with a boundary between the channel forming region and the lightly doped drain region.
A semiconductor device comprising:
- a semiconductor layer formed over a substrate, wherein the semiconductor layer contains a channel forming region and a drain region with a lightly doped drain region interposed therebetween;
- a first gate electrode formed adjacent to the semiconductor layer with a gate insulating film interposed therebetween;
- and
- a second gate electrode covering a top surface and a side surface of the first gate electrode,
- wherein the lightly doped drain region extends beyond a side surface of the second gate electrode, and
- wherein the side surface of the first gate electrode is aligned with a boundary between the channel forming region and the lightly doped drain region.
A semiconductor device comprising:
- a semiconductor layer formed over a substrate, wherein the semiconductor layer contains a channel forming region and a drain region with a lightly doped drain region interposed therebetween;
- a first gate electrode formed adjacent to the semiconductor layer with a gate insulating film interposed therebetween;
- and
- a second gate electrode covering a top surface and a side surface of the first gate electrode,
- wherein the lightly doped drain region extends beyond a side surface of the second gate electrode,
- wherein a portion of a bottom surface of the second gate electrode is in contact with the gate insulating film, and
- wherein the side surface of the first gate electrode is aligned with a boundary between the channel forming region and the lightly doped drain region.
Dependencies are inferred from the claim text.