Carbon nanotube field effect transistor and methods for making same
AssigneeMicron Technology, Inc.
InventorGurtej Sandhu
Life of this patent
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Abstract
A structure and fabrication process for a carbon nanotube field effect transistor is disclosed herein. In one embodiment, a method for forming a carbon nanotube transistor starts with a substrate comprised of a bottom dielectric, a carbon nanotube layer, and a top dielectric. A pillar is formed on the top dielectric, and a sidewall gate is formed on a sidewall of the pillar. A source is formed proximate to an outer edge of the gate and in contact with the carbon nanotube layer. The pillar is then removed, the source area masked, and a drain is formed proximate to an inner edge of the gate and in contact with the carbon nanotube layer. The source and drain are self aligned to the gate as dictated by the placement of dielectric spacers on the inner and outer edges of the gate.
Claims17
A method for forming carbon nanotube transistors, comprising:
- starting with a substrate comprised of a bottom dielectric, a carbon nanotube layer, and a top dielectric;
- forming alternating pillars on the top dielectric, the alternating pillars defining pillar regions and hole regions;
- forming gates for the transistors on the sidewalls of the pillars in the hole regions;
- forming sources in between the gates in the hole regions and in contact with the carbon nanotube layer;
- removing the pillars;
- and
- forming drains in between the gates in the pillar regions and in contact with the carbon nanotube layer.
A method for forming a carbon nanotube transistor, comprising:
- starting with a substrate comprised of a bottom dielectric, a carbon nanotube layer, and a top dielectric;
- forming a pillar on the top dielectric;
- forming a gate for the transistor on the sidewall of the pillar, the gate having an outer edge and an inner edge relative to the sidewall of the pillar;
- forming a source proximate to the outer edge of the gate and in contact with the carbon nanotube layer;
- removing the pillar;
- and
- forming a drain proximate to the inner edge of the gate and in contact with the carbon nanotube layer.
A method for forming a carbon nanotube transistor, comprising:
- forming a channel of at least one carbon nanotube on a substrate;
- forming a dielectric over the channel;
- defining a gate over the dielectric, wherein the gate comprises a spacer having a first edge and a second edge;
- masking the dielectric proximate to the first edge;
- etching the dielectric proximate to the second edge to expose a portion of the channel;
- forming a source region in contact with the exposed portion of the channel proximate to the second edge;
- masking the dielectric proximate to the second edge;
- etching the dielectric proximate to the first edge to expose a portion of the channel;
- and
- forming a drain region in contact with the exposed portion of the channel proximate to the first edge.
Dependencies are inferred from the claim text.