Capacitor attachment method
AssigneeFreescale Semiconductor, Inc.
InventorsWai Yew Lo, Chee Seng Foong
Life of this patent
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Abstract
A method of attaching a capacitor (112) to a substrate (100) includes applying a flux (108) to respective capacitor pads (104, 106) on the substrate (100). The capacitor (112) is placed on the fluxed capacitor pads (104, 106) and a reflow operation is performed on the capacitor (112) and the substrate (100) such that intermetallic interconnects (128) are formed between the capacitor (112) and the substrate (100).
Claims20
A method of attaching a capacitor to a substrate, consisting essentially of:
- applying a flux to respective capacitor pads on the substrate;
- placing the capacitor on the fluxed capacitor pads such that terminals of the capacitor contact respective ones of the fluxed capacitor pads;
- and
- performing a reflow operation on the capacitor and the substrate.
A method of forming a packaged semiconductor device, consisting essentially of:
- providing a substrate;
- applying a flux to respective capacitor pads on the substrate;
- placing one or more capacitors on the respective capacitor pads, wherein terminals of the capacitors contact respective ones of the substrate capacitor pads;
- placing one or more integrated circuit (IC) dice on respective controlled collapse chip connection (C4) pads on the substrate;
- and
- performing a reflow operation on the one or more capacitors, the one or more IC dice and the substrate.
A method of forming a multi-chip module, comprising the steps of:
- providing a substrate having gold-plated capacitor pads;
- applying a flux to respective capacitor pads and respective controlled collapse chip connection (C4) pads on the substrate;
- placing a plurality of capacitors on the respective fluxed capacitor pads, wherein the capacitors have tin-plated terminals;
- placing a plurality of integrated circuit (IC) dice on the respective fluxed C4 pads;
- performing a reflow operation on the substrate, the capacitors and the IC dice such that gold-tin (Au—Sn) intermetallic interconnects are formed between the substrate capacitor pads and the terminal ends of the respective capacitors;
- dispensing an underfill into a plurality of gaps between the substrate and the respective IC dice;
- and
- sealing the capacitors and the IC dice with respective ones of a plurality of lids, thereby forming the multi-chip module.
Dependencies are inferred from the claim text.