Plasma display panel
AssigneeSamsung SDI Co., Ltd.
InventorsJeong-Hyun Seo, Joo-Yul Lee, Tae-Hyun Kim, Hee-Hwan Kim, Min-Sun Yoo
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Abstract
A PDP having a driving circuit that reduces the reset voltage of the PDP driving waveforms to make it possible to use low-voltage elements and to achieve high contrasts is disclosed. Since conventional PDP waveforms require very high reset voltages, it causes a problem of intense background light emissions, low contrasts, use of high-voltage components, and increased circuit costs. According to the driving waveforms of the present invention, relative voltage differences between the address electrode and the X electrode and between the X electrode and the Y electrode are considered to design waveforms of low reset voltages, thereby providing high contrasts and low-cost circuit.
Claims51
A plasma display panel (PDP), comprising:
- a first substrate;
- a first electrode and a second electrode arranged respectively in parallel on the first substrate;
- a second substrate;
- an address electrode arranged on the second substrate;
- and
- a driving circuit that sends a driving signal to the first electrode, the second electrode and the address electrode during a reset period, an address period and a sustain period,
- wherein, during the reset period, the driving circuit,
- applies a first voltage level to the first electrode, while maintaining the second electrode at a second voltage level;
- applies a first voltage waveform to the second electrode, the first voltage waveform increasing with a first slope to a third voltage level, while maintaining the first electrode at a fourth voltage level;
- and
- applies a second voltage waveform to the second electrode, the second voltage waveform decreasing with a second slope to a fifth voltage level, while applying a sixth voltage level to the first electrode, wherein the fifth voltage level is a negative voltage.
A plasma display panel (PDP), comprising:
- a first substrate;
- a first electrode and a second electrode arranged respectively in parallel on the first substrate;
- a second substrate;
- an address electrode arranged on the second substrate;
- and
- a driving circuit that sends a driving signal to the first electrode, the second electrode and the address electrode during a reset period, an address period and a sustain period,
- wherein, during the reset period, the driving circuit,
- applies a first voltage waveform to the second electrode, the first voltage waveform decreasing from a first voltage level to a second voltage level, while maintaining the first electrode at a third voltage level;
- applies a second voltage waveform to the second electrode, the second voltage waveform increasing to a fourth voltage level, while maintaining the first electrode at a fifth voltage level;
- and
- applies a third voltage waveform to the second electrode, the third voltage waveform decreasing to a sixth voltage level, while applying a seventh voltage level to the first electrode, wherein the sixth voltage level is a negative voltage.
A plasma display panel (PDP), comprising:
- a first substrate;
- a first electrode and a second electrode arranged respectively in parallel on the first substrate;
- a second substrate;
- an address electrode arranged on the second substrate;
- and
- a driving circuit that sends a driving signal to the first electrode, the second electrode and the address electrode during a reset period, an address period and a sustain period,
- wherein, during the reset period, the driving circuit,
- applies a first voltage waveform to the second electrode, the first voltage waveform decreasing from a first voltage level to a second voltage level, while maintaining the first electrode at substantially the first voltage level;
- applies a second voltage waveform to the second electrode, the second voltage waveform increasing to a third voltage level, while maintaining the first electrode at a fourth voltage level;
- and
- applies a third voltage waveform to the second electrode, the third voltage waveform decreasing to a fifth voltage level, while applying a sixth voltage level to the first electrode,
- wherein the first voltage level is a positive voltage and the fifth voltage level is a negative voltage.
Dependencies are inferred from the claim text.