Systems and methods for scheduling coprocessor resources in a computing system

A computing device, comprising:

• a processor;
• a coprocessor;
• and
• a computer readable storage media coupled to the processor and the coprocessor, the computer readable storage media having stored computer-executable components comprising:
• an input interface component for receiving a command buffer from a user mode driver;
• a translator component that generates at least one direct memory access (DMA) buffer based on said command buffer;
• a kernel mode driver component that generates a resource list comprising at least one graphics data memory resource associated with processing said at least one DMA buffer by said coprocessor, wherein said resource list includes an expected current context state when said DMA buffer is submitted for processing by said coprocessor;
• a scheduler component for generating a paging DMA buffer including at least one instruction for the coprocessor to move the at least one graphics data memory resource to an assigned location;
• and
• an output interface component for submitting said at least one DMA buffer to said coprocessor for processing of DMA buffer contents.

A computing device, including a processor and a coprocessor, configured to schedule operations of the coprocessor, the computing device comprising:

• means for receiving by a kernel mode driver a command buffer from a user mode driver;
• means for generating by the kernel mode driver at least one DMA buffer based on said command buffer;
• means for generating by the kernel mode driver a resource list comprising at least one graphics data memory resource associated with processing said at least one direct memory access (DMA) buffer by said coprocessor, wherein said resource list includes an expected current context state when said DMA buffer is submitted for processing by said coprocessor;
• means for generating a paging DMA buffer including at least one instruction for the coprocessor to move the at least one memory resource to an assigned location;
• and
• means for submitting said at least one DMA buffer to said coprocessor for processing of DMA buffer contents.