Method and apparatus for facilitating debugging of an integrated circuit

An apparatus to facilitate debugging of an integrated circuit without probing signal lines within the integrated circuit, wherein the integrated circuit includes performance counters but does not include debug counters, the apparatus comprising:

• an updating mechanism configured to update a performance counter within the integrated circuit based on the occurrence of one or more performance events, wherein the updating mechanism and the performance counter are specifically designed to measure performance of the integrated circuit, and wherein the updating mechanism and the performance counter are not designed to debug the integrated circuit;
• and
• a triggering mechanism configured to use the performance counter to debug the integrated circuit by triggering a debugging operation based on the performance counter's contents, thereby facilitating debugging of the integrated circuit without probing signal lines within the integrated circuit, wherein the debugging operation involves at least one of stopping a system clock, recording a transaction or a packet into a history buffer, starting the recording of transactions or packets into a history buffer, or stopping the recording of transactions or packets into a history buffer;
• wherein reusing the performance counter to trigger the debugging operation in addition to measuring performance obviates the need for having separate debug counters and also obviates the need for having separate circuitry for updating debug counters, and hence, substantially reduces the amount of additional circuitry required to facilitate debugging of the integrated circuit.

A computer system that includes a debugging-circuit to facilitate debugging of an integrated circuit without probing signal lines within the integrated circuit, wherein the integrated circuit includes performance counters but does not include debug counters, the debugging-circuit comprising:

• an updating circuit configured to update a performance counter within the integrated circuit based on the occurrence of one or more performance events, wherein the updating circuit and the performance counter are specifically designed to measure performance of the integrated circuit, and wherein the updating circuit and the performance counter are not designed to debug the integrated circuit;
• and
• a triggering circuit configured to use the performance counter to debug the integrated circuit by triggering a debugging operation based on the performance counter's contents, thereby facilitating debugging of the integrated circuit without probing signal lines within the integrated circuit, wherein the debugging operation involves at least one of stopping a system clock, recording a transaction or a packet into a history buffer, starting the recording of transactions or packets into a history buffer, or stopping the recording of transactions or packets into a history buffer;
• wherein reusing the performance counter to trigger the debugging operation in addition to measuring performance obviates the need for having separate debug counters and also obviates the need for having separate circuitry for updating debug counters, and hence, substantially reduces the amount of additional circuitry required to facilitate debugging of the integrated circuit.