Method and related apparatus for adjusting timing of memory signals
AssigneeVIA Technologies, Inc.
InventorsBowei Hsieh, Ming-Shi Liou
Life of this patent
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Abstract
A method and related apparatus for adjusting/calibrating timing of memory signals. In a preferred embodiment of the invention, reference signals of the same frequency and different phase are generated by a phase-lock loop. These reference signals are used to trigger sampling of signals for generating signals of different timing/delay; then timing/delay of memory signals, such as clock, command, data and data strobe, can be adjusted and calibrated. In this way, the invention can avoid the use of delay lines while adjusting/calibrating memory signals, so as to reduce the negative effects of characteristics shift and variation of delay lines.
Claims16
A method for adjusting timing of signals, the method comprising:
- generating a plurality of reference signals, all having the same frequency but different phase;
- selecting a first reference signal from the reference signals;
- adjusting a first signal output delay time according to the first reference signal to output a delayed first signal;
- selecting a second reference signal from the reference signals;
- adjusting a second signal output delay time to output a delayed second signal;
- sending a command to a memory according to the delayed first signal;
- and
- writing specific data into the memory in co-ordination with the delayed second signal.
A method for adjusting timings of memory signals of a computer system, the method comprising:
- generating a plurality of reference signals, all having the same frequency but different phase;
- selecting a first reference signal from the reference signals:
- adjusting a first signal output delay time according to the first reference signal to output a delayed first signal;
- adjusting a second signal output delay time according to a second reference signal to output a delayed second signal;
- selecting the first reference signal according to memory arrangements of the computer system when the computer system is turned on;
- and
- establishing a look-up table having relationships between the memory arrangements and the first reference signal.
method for adjusting timing of signals, the method comprising:
- generating a plurality of reference signals, all having the same frequency but different phase;
- selecting a first reference signal from the reference signals;
- and
- adjusting a first signal output delay time according to the first reference signal to output a delayed first signal;
- wherein the method is capable of being utilized for adjusting timings of memory signals of a computer system, and the method further comprises:
- selecting the first reference signal from the reference signals according to memory arrangements of a computer system when the computer system is turned on;
- and establishing a look-up table having relationships between the memory arrangements and the first reference signal.
Dependencies are inferred from the claim text.