Method and system for trace generation using memory index hashing

A computer-accessible storage medium, comprising program instructions, wherein the instructions are computer-executable to:

• generate an extended instruction trace representative of M distinct threads of instruction execution from an instruction trace representative of N distinct threads of instruction execution, wherein N is an integer greater than or equal to 1, and wherein M is an integer greater than N;
• wherein each of said N distinct threads of said instruction trace includes memory references to respective memory addresses, and wherein to generate said extended instruction trace from said instruction trace, the instructions are further executable to:
• replicate said N distinct threads to generate said M distinct threads;
• assign a respective unique identifier to each of said M distinct threads;
• and
• for at least some of said memory references included in a given one of said M distinct threads, hash a first portion of each of said respective memory addresses dependent upon said respective unique identifier of said given one of said M distinct threads, wherein said first portion of each of said respective memory addresses corresponds to at least part of an index of a memory structure shared by at least two of said M distinct threads.

A system, comprising:

• a system memory configured to store instructions;
• and
• one or more processors configured to access said system memory, wherein the instructions are executable by at least one of said one or more processors to:
• generate an extended instruction trace representative of M distinct threads of instruction execution from an instruction trace representative of N distinct threads of instruction execution, wherein N is an integer greater than or equal to 1, and wherein M is an integer greater than N;
• wherein each of said N distinct threads of said instruction trace includes memory references to respective memory addresses, and wherein to generate said extended instruction trace from said instruction trace, the instructions are further executable by said at least one of said one or more processors to:
• replicate said N distinct threads to generate said M distinct threads;
• assign a respective unique identifier to each of said M distinct threads;
• and
• for at least some of said memory references included in a given one of said M distinct threads, hash a first portion of each of said respective memory addresses dependent upon said respective unique identifier of said given one of said M distinct threads, wherein said first portion of each of said respective memory addresses corresponds to at least part of an index of a memory structure shared by at least two of said M distinct threads.