Method and system for using external storage to amortize CPU cycle utilization
AssigneeTransmeta Corporation
InventorsBrian O'Clair, Dean Gaudet
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Abstract
A method and system for using external storage to amortize CPU cycle utilization, wherein translated instructions are stored in a storage medium and subsequently accessed on a subsequent execution of a non-native application in order to amortize CPU cycles used in generating the translated instructions.
Claims21
A method for using external storage to amortize CPU cycle utilization, comprising:
- generating microarchitecture instructions for execution by a CPU microarchitecture by using an instruction decoder within a processor environment, the microarchitecture instructions generated during an initial execution of a non-native application, wherein the microarchitecture instructions comprise pipeline instructions for the CPU hardware;
- storing the microarchitecture instructions in a storage medium external to the processor environment;
- and
- accessing the microarchitecture instructions in the storage medium to execute on the CPU hardware of the processor environment, wherein the microarchitecture instructions are accessed on a subsequent execution of the non-native application.
A system for using external storage to amortize CPU cycle utilization, comprising:
- an instruction decoder for generating microarchitecture instructions for execution by a processor microarchitecture within a processor environment, the microarchitecture instructions generated during an initial execution of a target application;
- an external storage medium external to the processor environment, the storage medium coupled to receive the microarchitecture instructions and store the microarchitecture instructions;
- and
- CPU hardware configured to access the microarchitecture instructions and to execute the microarchitecture instructions, wherein the microarchitecture instructions are accessed on a subsequent execution of the target application, and wherein the microarchitecture instructions comprise pipeline instructions for the CPU hardware.
A computer readable storage media for implementing external storage to amortize CPU cycle utilization, the media storing computer readable code which when executed by a processor causes the processor to implement a method comprising:
- generating microarchitecture instructions by using an instruction decoder for execution by a processor microarchitecture within a processor environment, the microarchitecture instructions generated during an initial execution of a target application, wherein the microarchitecture instructions comprise pipeline instructions for the CPU hardware;
- storing the microarchitecture instructions in a storage medium external to the processor environment;
- and
- accessing the microarchitecture instructions in the storage medium to execute on the CPU hardware of the processor environment, wherein the microarchitecture instructions are accessed on a subsequent execution of the target application.
Dependencies are inferred from the claim text.