Multi-variable polynomial modeling techniques for use in integrated circuit design
AssigneeAgere Systems Inc.
InventorJohn A. Carelli, Jr.
Life of this patent
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AssigneeAgere Systems Inc.
InventorJohn A. Carelli, Jr.
Estimating the term…
Techniques are disclosed for modeling a cell of an integrated circuit design. In one aspect of the invention, a full-space polynomial model is fit to cell information comprising measured data points associated with one or more independent variables such as voltage slew, capacitive load, supply voltage or temperature. Error values are generated indicative of error between the measured data points and the full-space polynomial model. The error values are used to partition the modeling space into domains. For at least a given one of the domains, a first polynomial model is generated based on a subset of the measured data points and at least one additional data point determined by interpolation from the measured data points in the subset. Error values are generated indicative of error between the measured data points of the subset and the first polynomial model. A shifted model is generated by applying correction factors determined from the error values to respective data points taken from the first polynomial model. A second polynomial model of the given domain is generated by fitting to a plurality of data points from the shifted model.
A method of modeling a cell of an integrated circuit design, the method comprising the steps of:
An apparatus for use in modeling a cell of an integrated circuit design, the apparatus comprising:
An article of manufacture for use in modeling a cell of an integrated circuit design, the article of manufacture comprising a storage medium containing one or more software programs which, when executed by a processing device, perform the steps of:
Dependencies are inferred from the claim text.