Sequence detector using Viterbi algorithm with reduced complexity sequence detection via state reduction using symbol families

An electronic circuit comprising a sequence detector for converting a sequence of digital values of a detector input signal into a sequence of symbols chosen from an alphabet of predefined symbols allocated into multiple non-overlapping families each formed with a plurality of the predefined symbols, each of a multiplicity of states of the sequence detector defined at least partially by at least one of the families, the sequence detector comprising:

• a branch metric generator (a) for making intra-family branch selections during multiple time periods which each progressively become the kth time period where k is a running integer, each branch selection being one of a plurality of branches respectively corresponding to the predefined symbols of a family for transitioning from one of the states at the (k−1)th time period to one of the states at the kth time period, and (b) for generating branch metrics each being a measure of how much one of the digital values differs from a transition value corresponding to one of the branch selections for a transition from one of the states at the (k−1)th time period along an allowable path to one of the states at the kth time period;
• comparison circuitry (a) for determining state metrics each being the best of a set of state-metric computations for a particular state at the kth time period where each state-metric computation depends on the state metric for a state at the (k−1)th time period and the branch metric for a transition from that state at the (k−1)th time period to the particular state at the kth time period and (b) for generating comparison results each indicating which state at the (k−1)th time period is the state in the state-metric computation that constitutes the state metric for a state at the kth time period;
• and
• symbol generation circuitry for utilizing the comparison results and the branch selections or selection information generated from the branch selections to generate a final sequence of the predefined symbols such that the final sequence approximates, as a sequence, the sequence of digital values.