Multi-port memory device with serial input/output interface
AssigneeHynix Semiconductor Inc.
InventorChang-Ho Do
Life of this patent
Estimating the term…
Abstract
A multi-port memory device includes a plurality of serial I/O data pads; a plurality of parallel I/O data pads; a plurality of first ports for performing a serial I/O data communication with external devices through the serial I/O data pads; a plurality of banks for performing a parallel I/O data communication with the first ports via a plurality of first data buses; and a second port for performing a parallel I/O data communication with the external devices through the parallel I/O data pads and a serial I/O data communication with the first ports via a plurality of second data buses, during a test mode.
Claims64
A multi-port memory device, comprising:
- a plurality of first pads for providing serial input/output (I/O) data;
- a plurality of second pads for providing parallel I/O data;
- a plurality of first ports for performing a serial I/O data communication with external devices through the first pads;
- a plurality of banks for performing a parallel I/O data communication with the first ports via a plurality of first data buses;
- and
- a second port for performing a parallel I/O data communication with the external devices through the second pads and a serial I/O data communication with the first ports via a plurality of second data buses, during a test mode,
- wherein the second port deserializes test data signals inputted from the banks in series through the first ports and outputs the deserialized test data signals to the external devices through the parallel I/O data pads.
A multi-port memory device, comprising:
- a plurality of first pads for providing serial input/output (I/O) data;
- a plurality of first ports for performing a serial I/O data communication with external devices through the first pads;
- a plurality of banks for performing a parallel I/O data communication with the first ports via a plurality of first data buses;
- and
- a second port for performing a parallel I/O data communication with the external devices through the first pads and a serial I/O data communication with the first ports via a plurality of second data buses, during a test mode,
- wherein the second port deserializes test data signals inputted in series from the banks through the first ports, and outputs the deserialized test data signals the external devices through the parallel I/O data pads.
A multi-port memory device including a plurality of first ports for performing a serial I/O data communication with external devices, a plurality of banks for performing a parallel I/O data communication with the first ports via a plurality of global data buses, the multi-port memory device comprising:
- a second port, during a test mode, serializing test signals inputted in parallel through external pads to transfer the serialized test signals to the first ports, and deserializing test data signals inputted in series from the first ports to output the deserialized test data signals to the external devices through the external pads in response to the test signals.
Dependencies are inferred from the claim text.