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US 7,443,752 B2Granted
Semiconductor memory device amplifying data
AssigneeHynix Semiconductor Inc.
InventorSung-Joo Ha
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes an I/O line, a first sense amplifier connected to the first I/O line to amplify a signal applied on the first I/O line in response to a first control signal, a second sense amplifier for amplifying an output signal of the first sense amplifier in response to a second control signal, and a disabling unit for disabling the first control signal in response to an output signal of the second sense amplifier.
Claims28
A semiconductor memory device comprising:
- an input/output (I/O) line;
- a first sense amplifier connected to the I/O line to amplify a signal applied on the I/O line;
- a second sense amplifier for sensing and amplifying an output signal of the first sense amplifier;
- and
- a controller for controlling the first sense amplifier by feeding back an output signal of the second sense amplifier into the first sense amplifier,
- wherein the first sense amplifier is inactivated while the second sense amplifier amplifies the output signal of the first sense amplifier and after the second sense amplifier completes an operation sensing the output signal of the first sense amplifier.
3 more elements
A semiconductor memory device comprising:
- an I/O line;
- a first sense amplifier connected to the I/O line to amplifier a signal applied on the I/O line;
- a second sense amplifier for sensing and amplifying an output signal of the first sense amplifier;
- and
- an enable timing controller for controlling a driving of the first sense amplifier in response to an output signal of the second sense amplifier,
- wherein the first sense amplifier is inactivated while the second sense amplifier amplifies the output signal of the first sense amplifier and after the second sense amplifier completes an operation sensing the output signal of the first sense amplifier.
3 more elements
A semiconductor memory device comprising:
- an input/output (I/O) line;
- a first sense amplifier connected to the I/O line to amplify a signal applied on the I/O line in response to a first control signal;
- a second sense amplifier for sensing and amplifying an output signal of the first sense amplifier in response to a second control signal, and
- a disabling unit for disabling the first control signal in response to an output signal of the second sense amplifier,
- wherein the first sense amplifier is inactivated while the second sense amplifier amplifies the output signal of the first sense amplifier and after the second sense amplifier completes an operation sensing the output signal of the first sense amplifier.
2 more elements
A semiconductor memory device comprising:
- a first sense amplifier for primarily sensing and amplifying data applied on an I/O line;
- a second sense amplifier for secondarily sensing and amplifying an output signal of the first sense amplifier;
- a first control signal generator for receiving a column pulse signal and generating a first control signal to the first sense amplifier;
- a second control signal generator for receiving the column pulse signal and generating a second control signal to the second sense amplifier;
- and
- a driving controller for controlling a driving of the first sense amplifier in response to an output signal of the second sense amplifier,
- wherein the first sense amplifier is inactivated while the second sense amplifier amplifies the output signal of the first sense amplifier and after the second sense amplifier completes an operation sensing the output signal of the first sense amplifier.
4 more elements
Dependencies are inferred from the claim text.