Method for reducing wiring and required number of redundant elements
AssigneeInternational Business Machines Corporation
InventorsDerick Gardner Behrends, Peter Thomas Freiburger, Ryan Charles Kivimagi, Daniel Mark Nelson
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Abstract
A method and enhanced Static Random Access Memory (SRAM) redundancy circuit reduce wiring and the required number of redundant elements. A bitline redundancy mechanism allows the swapping of a pair of bitlines for a redundant pair of bit columns. Two of the adjacent bitlines are swapped out at a time, one even and one odd. The swap is accomplished by steering the data around the bad columns and adding redundant columns on the end that are steered in when needed.
Claims4
A method for implementing a Static Random Access Memory (SRAM) redundancy circuit with bit columns interleaved with respective even and odd bits comprising:
- providing a bitline redundancy mechanism to allow swapping of a pair of bitlines for a redundant bitline pair;
- swapping two of the adjacent bitlines at a time, one even and one odd by steering around at least one bad column and adding two redundant columns.
Dependencies are inferred from the claim text.