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US 7,443,712 B2Granted
Memory erase management system
AssigneeSpansion LLC
InventorsColin Bill, Mark McClain, Michael VanBuskirk
Life of this patent
Estimating the term…
Abstract
A memory erase management system is provided, including providing a resistive change memory cell, coupling a first line to the resistive change memory cell, coupling a line buffer to the first line, providing a charge storage device coupled to the line buffer, and performing a single pulse erase of the resistive change memory cell by discharging a current from the charge storage device through the resistive change memory cell.
Claims20
A memory erase management method comprising:
- providing a resistive change memory cell;
- coupling a first line to the resistive change memory cell;
- coupling a line buffer to the first line;
- providing a charge storage device coupled to the line buffer;
- and
- performing a single pulse erase of the resistive change memory cell by discharging a current from the charge storage device through the resistive change memory cell.
3 more elements
A memory erase management method comprising:
- providing a resistive change memory cell, having a switch cell and a cell transistor;
- coupling a bit line to the resistive change memory cell, including a bit line select transistor;
- coupling a line buffer to the bit line;
- providing a charge storage device coupled to the line buffer, includes providing a capacitor;
- and
- performing a single pulse erase of the resistive change memory cell by discharging a current from the charge storage device through the resistive change memory cell, including passing the current through the cell transistor.
3 more elements
A memory erase management system comprising:
- a resistive change memory cell;
- a first line coupled to the resistive change memory cell;
- a line buffer coupled to the first line;
- a charge storage device coupled to the line buffer in which the charge storage device having a current discharged through the resistive change memory cell in a single pulse erase of the resistive change memory cell.
1 more element
Dependencies are inferred from the claim text.