US 7,443,374 B2 · Pixel cell design with enhanced voltage control

Abstract

The present invention discloses a pixel display configuration by providing a voltage controller in each pixel control circuit for controlling the voltage inputted to the pixel electrodes. The controller includes a function of multiplexing the voltage input to the pixel electrodes and also a bit buffering and decoupling function to decouple and flexible change the input voltage level to the pixel electrodes. The controller further includes a first switching stage and a second switching stage and each stage has a P-type transistor and a N-type transistor to expand the range of the switching voltages such that the improvement of the pixel control is further enhanced. The rate of DC balancing can be increased to one KHz and higher to mitigate the possibility of DC offset effects and the image sticking problems caused by slow DC balancing rates. This invention further discloses an enabling technology for switching from one DC balance state to another without rewriting the data onto the panels. Therefore, it is not required to implement a high voltage CMOS designs and standard CMOS technologies can be applied to manufacture the storage cells and control panel for the LCOS displays with lower production cost and higher yields.

Claims35

Dependent claims

A display device comprising a plurality of pixel cells having a common electrode switchable between a high voltage VITO—H and a low voltage VITO—L said display device further comprising:

a voltage controller connected to a multiplexing switch in each of said pixel cells to provide control signals to digitally select a switch-on state and a switch-off state to apply a high voltage V1 and a low voltage V0 on a pixel electrode in each of said pixel cells wherein said high and low voltage substantially equal to a voltage represented by V1 and V0 respectively wherein said voltage of V1 and V0 are different from voltages Vdd and Vss as as high and low rail voltages respectively applied to a backplane of the display device;
said voltage controller further includes a DC balancing state timing controller for synchronizing an inverting operation of said substantially V1 or V0 applied to said pixel electrode and controlling an inverter in each of said pixel cells with a common electrode DC-balancing switch between said high voltage VITO—H and low voltage VITO—L ;
and
said multiplexing switch in each of said pixel cell including a P-type transistor and a N-type transistor for providing expanded range of controllable voltages of said display device.

1 more element

A method for displaying an image on a display device comprising a plurality of pixel cells having a common electrode switchable between a high voltage VITO—H and a low voltage VITO—L comprising:

connecting a voltage controller to a multiplexing switch in each of said pixel cells to provide control signals to digitally select a switch-on state and a switch-off state to apply a high voltage and a low voltage on a pixel electrode in each of said pixel cells and controlling an inverter in each of said pixel cells whereby a DC balancing and a pixel image transition for each of said pixel cells is achieved without requiring, a contemporaneous production of an internal transistion signal from within said pixel cell;
and
implementing in said multiplexing switch in each of said pixel cell a P-type transistor and a N-type transistor whereby a P-type transistor for expanding a range of controllable voltages of operating said display device.

Dependencies are inferred from the claim text.

Pixel cell design with enhanced voltage control

Life of this patent

Pixel cell design with enhanced voltage control

Life of this patent

Abstract

Claims35