US 7,443,332 B2 · Time continuous pipeline analog-to-digital converter

Abstract

A Sampled Pipeline Subranging Converter (SPSC) may include at least one stage—e.g. at least the input stage—operating in a time-continuous fashion. In the time continuous input stage, the analog input may be processed in two parallel paths. A lower path may comprise a track-and-hold (T/H) element, an Analog-to-Digital-Converter (ADC) and a Digital-to-Analog-Converter (DAC). The T/H element may be optional and may be present if required by the ADC. The signal entering the lower path may be sampled at the desired conversion rate. The time continuous stage(s) may additionally be configured with an upper path that includes a delay element configured to receive the analog input, a Low-Pass (LP) filter coupled to the delay element, and an anti alias filter. The output generated by the DAC may be subtracted from the output of the LP filter, and the resulting difference signal may be provided to the anti alias filter, which in turn may generate the residue (or error) output. The digital output of the time continuous converter may be calculated by combining the digital outputs of the various sections.

Claims26

Dependent claims

A converter comprising:

an analog input port configured to receive a primary analog input signal;
a digital output port configured to provide a primary digital output signal representative of the primary analog input signal;
and
a plurality of converter stages coupled in a pipeline, wherein a primary input of the pipeline is coupled to the analog input port;
wherein each of at least a subset of the plurality of converter stages is operable to:
receive a time-continuous respective analog input signal;
generate a respective digital output signal based on the received time-continuous respective analog input signal;
generate an analog version of the respective digital output signal;
generate a respective residue output by combining the received time-continuous respective analog input signal and the analog version of the respective digital output signal;
and
provide the respective residue output as an analog input signal of a next one of the plurality of converter stages in the pipeline;
wherein the converter is operable to generate the primary digital output signal by combining the respective digital output signals of the plurality of converter stages.

9 more elements

A time continuous subranging analog-to-digital converter, the converter comprising:

a main input configured to receive a time-continuous first analog input signal;
a first stage comprising:
a delay element having an input coupled to the main input and operable to delay the time-continuous first analog input signal;
a low-pass filter configured to receive the delayed time-continuous first analog input signal and filter the delayed time-continuous first analog input signal;
a sub-analog-to-digital-converter (SADC) having an input coupled to the main input and operable to generate a first digital signal representative of the time-continuous first analog input signal;
a sub-digital-to-analog-converter (SDAC) configured to receive the first digital signal and generate a first analog output signal representative of the first digital signal;
and
a first difference element configured to generate a first difference signal from the filtered delayed time-continuous first analog input signal and the first analog output signal;
one or more additional stages coupled in a pipeline, wherein each of the one or more additional stages is operable to:
receive a respective analog input signal;
generate a respective digital signal representative of the respective analog input signal;
generate a respective analog output signal representative of the respective digital signal;
and
generate a respective difference signal based on the respective analog input signal and the respective analog output signal, wherein a first stage of the one or more additional stages is configured to receive the first difference signal as its respective analog input signal, and each other stage of the one or more additional stages is operable to receive as its respective analog input signal the difference signal from a previous stage of the one or more additional stages in the pipeline;
and
circuitry configured to generate a digital output signal representative of the time-continuous analog input signal, by combining the first digital signal and the respective digital signals generated by the one or more additional stages in the pipeline.

13 more elements

Dependencies are inferred from the claim text.

Time continuous pipeline analog-to-digital converter

Life of this patent

Time continuous pipeline analog-to-digital converter

Life of this patent

Abstract

Claims26